1.1.1 Structure and Function of the Processor

• What is the primary function of a processor?

  It executes instructions for programs
• What does the Arithmetic and Logic Unit (ALU) do?

  It completes arithmetical and logical operations
• What types of operations does the ALU perform?

  Arithmetical and logical operations
• What are examples of arithmetical operations?

  Addition and subtraction of numbers
• What are examples of logical operations?

  AND, OR, NOT, and XOR operations
• What is the role of the Control Unit?

  It directs operations of the CPU
• What are the main jobs of the Control Unit?

  • Control and coordinate CPU activities
  • Manage data flow between CPU and devices
  • Accept the next instruction
  • Decode instructions
  • Store resulting data back in memory
• What are registers in a CPU?

  Small memory cells operating at high speed
• What operations occur in registers?

  Arithmetic, logical, and shift operations
• What is the purpose of the Program Counter (PC)?

  Holds the address of the next instruction
• What does the Accumulator (ACC) do?

  Stores results from calculations
• What is the function of the Memory Address Register (MAR)?

  Holds the address for reading or writing
• What does the Memory Data Register (MDR) temporarily store?

  Data that has been read or needs writing
• What is the role of the Current Instruction Register (CIR)?

  Holds the current instruction being executed
• What are buses in a CPU?

  Parallel wires connecting CPU components
• What are the three types of buses in a CPU?

  • Data bus
  • Control bus
  • Address bus
• What is the system bus?

  Collective term for data, control, and address buses
• How does the width of a bus affect data transfer?

  It determines the number of bits transferred simultaneously
• What is the data bus used for?

  Transporting data and instructions between components
• What is the address bus used for?

  Transmitting memory addresses for data retrieval
• What is the control bus used for?

  Transmitting control signals between components
• What are some control signals transmitted by the control bus?

  • Bus request
  • Bus grant
  • Memory write
  • Memory read
  • Interrupt request
  • Clock
• What does assembly language use to represent instructions?

  Mnemonics to simplify machine code
• How is an instruction divided in the Current Instruction Register?

  Into operand and opcode
• What are the three factors affecting CPU performance?

  Clock speed, number of cores, cache memory
• What determines the clock speed of a CPU?

  The system clock generates switching signals
• What is a core in a CPU?

  An independent processor running its own cycle
• How does having multiple cores affect CPU performance?

  It allows multiple fetch-execute cycles simultaneously
• What is cache memory?

  Onboard memory for quicker data access
• What are the types of cache memory and their properties?

  • Level 1 Cache: Very fast, small capacity (2-64KB)
  • Level 2 Cache: Relatively fast, medium capacity (256KB-2MB)
  • Level 3 Cache: Larger, slower memory cell
• What is Von Neumann Architecture?

  • Basic components: single control unit, ALU, registers, memory units
  • Shared memory and data bus for data and instructions
  • Built on the stored program concept
• What is Harvard Architecture?

  • Physically separate memories for instructions and data
  • Useful for embedded processors
  • Allows optimization of memory characteristics
• What is pipelining in CPU processing?

  • Completing fetch, decode, and execute cycles simultaneously
  • Reduces idle CPU time
  • Includes instruction and arithmetic pipelining
• What is the fetch-decode-execute cycle?

  • Sequence of operations to execute an instruction
  • Fetch phase: Copy address to MAR, retrieve instruction to MDR
  • Decode phase: Split CIR into operand and opcode
  • Execute phase: Execute the decoded instruction
• What are the advantages of Von Neumann Architecture?

  • Cheaper to develop
  • Easier control unit design
• What are the advantages of Harvard Architecture?

  • Quicker execution due to parallel fetching
  • Programs can be optimized in size
  • Different memory sizes for efficiency
• How do contemporary processors utilize both architectures?

  • Von Neumann for main memory data and instructions
  • Harvard for dividing cache into instruction and data cache