In CISC there is a large instruction set. The goal is to try and execute in as few as lines as possible in assembly code, these instructions are built into the hardware.
In RISC the compiler has to do more work to translate high level code to machine code compared to CISC.
In RISC more RAM is required to store the code compared to CISC.
Multi-core CPUs have multiple independent cores that can complete instructions separately which results in higher performance