CISCs and RISCs

• At the core of all computers is the instruction set, which is the set of all instructions written in machine code that can be recognized and executed by a given processing unit or CPU.
• There are two main categories of instruction sets: Complex Instruction Set Computer (CISC) and Reduced Instruction Set Computer (RISC).
• A high-level abstraction of a storage design for a generic computer serves as an illustration.
• Main memory is located at the top of the design and is addressed from zero to one in binary.
• The execution unit carries out all calculations and can only operate on data that's been loaded into one of six registers, which are labeled r0 to r1.
• When executed, the malt instruction would load the two values into the register, multiply them together, and store the result back out.
• The risk architecture has become incredibly popular in low power and portable devices such as smart tvs, thermostats, smart watches, phones, tablets, printers, home assistants, and tb sticks.
• The complex instruction set computer (CISC) can include a specific instruction for multiplying two numbers, which is referred to as malt.
• In the generic computer example, if the complex command such as malt doesn't exist, it would need to be separated into a number of simpler commands.
• The simple instruction set computer (SISC) aims to use simple instructions which can be executed within a single machine or clock cycle.
• The task is to find the product of two numbers, where the first number is stored in memory location zero, the second number in memory location one, and the result of the calculation is stored back in memory location zero.
• The complex instruction set computer (CISC) aims to complete tasks in as few lines of assembly as possible, often leading to more complicated hardware.
• In a high-level language, this would be a line of code: product = num1 * num2.
• The risk architecture aims to use simple instructions which can be executed within a single machine or clock cycle.
• Arm processors and other architectures that work off of risk now make up well over 90 percent of all processors in use today.
• Risk architecture gets around this problem by using fixed-sized instructions.
• In the risk architecture, each instruction can be completed in a single clock cycle, requiring fewer transistors and less complex hardware.
• The reduction in price of ram and increased sophistication of compiler technology means the risk emphasis on software over hardware has become ideal.
• The risk philosophy attempts to reduce the cycles per instruction but at the cost of the number of instructions that end up in the end assembly program.
• Intel, with its enormous influence and resources, threw its weight behind cisc processes, which became increasingly unwieldy and difficult to develop over time.
• Today, Intel X86 is the only chip that retains sisk architecture, and even then, it implements many features such as micro codes that allow it to operate in a risk type fashion.
• Risk lacks software support, especially in the early days, as Windows 3.1 and 90 to 5 were designed with cisc processors in mind.
• Most companies were unwilling to take a chance on risk, which was seen as an emerging technology in the beginning.
• Sales of risk-based processors far outstrip Intel Sysversons, which peaked at 0.3 billion processors back in 2011.
• The sisk architecture has a variable length of instructions, which becomes problematic when we try to utilize pipelining to increase performance.
• Risk-based processing has many advantages, but it took well over a decade to gain acceptance on a large commercial scale.
• The sisk approach attempts to minimize the number of instructions per program but sacrifices the number of cycles per instruction.