Component 1

• What does RISC stand for?

  Reduced Instruction Set Computer
• What does CISC stand for?

  Complex Instruction Set Computer
• What are some advantages of using RISC over CISC?

  RISC uses less power, so they cost less money to run. RISC generates less heat, so systems with a RISC processor need less cooling. They have less complex circuitry so they are easier to manufacture. They have a simple design and have less transistors.
• What are some advantages of using CISC over RISC?

  Assembly code made for a CISC processor will be shorter, since CISC instructions are more complex and perform more actions. CISC instructions are more human-readable. Most pre-existing code is built for CISC. CISC processors execute more clock cycles per second.
• Which processor architecture has a shared memory unit for both instructions and data?

  Von Neumann architecture
• Which processor architecture has two separate memory units for data and instructions?

  Harvard architecture
• What is the advantage of having separate memory units for data & instructions?

  The CPU can both read an instruction and read data from memory simultaneously, increasing performance.
• Define 'register'

  A low-capacity, fast-to-access memory unit located inside the CPU, which stores data temporarily.
• What are the 3 factors affecting CPU performance?

  Cache size, clock speed, number of cores.
• In which processor architecture do instructions take exactly 1 clock cycle to complete?

  RISC
• Explain what is meant by 'pipelining'

  Pipelining is the execution of multiple stages of the fetch-decode-execute cycle in parallel, used in order to increase performance in RISC systems. Fetching the next instruction, decoding the current instruction and executing the previous instruction are done in parallel.
• Explain why pipelining cannot be used in a CISC processor.

  CISC instructions complete in a varying number of clock cycles, depending on the complexity of the instruction. For pipelining to be usable, the processor must be able to know when the instruction will finish, which can only be done in a RISC processor (since all instructions finish in 1 clock cycle.)
• What are the 3 buses that encompass the system bus?

  Address bus Control bus Data bus
• Instructions are sent from RAM to the CPU through which bus?

  Data bus
• Which bus goes one-way from CPU to memory?

  Address bus
• What is the name for a processor with multiple cores?


  Chip Multiprocessor (CMP)
• Explain why, in general, more cores leads to more performance

  In a chip multiprocessor, each core can process instructions concurrently (in parallel) and therefore increase performance.
• Give 2 reasons why the relationship between the number of cores and throughput may not be linear.

  The application in question may not be optimised to use all cores. The control unit has to do more work to manage all of the cores.
• What is the term for a signal sent through the control bus?

  Control line
• For each of the 3 components, write down whether they have a one-way or two-way connection between each bus in the system bus. CPU Memory I/O Device

  CPU: - CPU -> Address Bus - CPU <-> Data Bus - CPU <-> Control Bus Memory: - Memory <- Address Bus - Memory <-> Data Bus - Memory <-> Control Bus I/O: - I/O <-> Address Bus - I/O <-> Data Bus - I/O <-> Control Bus
• Describe what happens during the fetch-decode-execute cycle, mentioning buses

  The program counter's stored value increments to the address of the next instruction in RAM. This address is copied to the Memory Address Register. The program counter then increments again. This value in the MAR is placed on the address bus. The Control Unit sends a "Memory Read"" control line, indicating to the memory controller to read the address on the address bus and return the corresponding instruction through the data bus. The instruction is copied into the Memory Data Register and the Current Instruction Register. The decoder inside the CU decodes the instruction into signals to perform the instruction. The arithmetic-logic unit, if needed, evaluates arithmetic and boolean expressions and stores the result in the accumulator. The instruction may be stored in the cache if it is accessed regularly."
• Under what 2 conditions will the program counter change?

  1) The previous instruction address was just copied to the MAR. The PC will increment to the next instruction 2) The program branched. The PC will increment to the address specified in the branch instruction.
• What is meant by "clock frequency""? What are its units?"

  Clock frequency is the number of clock cycles completed per second. It is measured in GHz, 1GHz = 1,000,000,000 clock cycles/second
• Describe the arithmetic-logic unit


  The arithmetic-logic unit (ALU) is a circuit which evaluates arithmetic and boolean expressions. The result of these expressions are stored in the accumulator (ACC)
• SIMD stands for..

  Single instruction multiple data
• Describe the features of a GPU

  A GPU (Graphics processing unit) is a coprocessor designed for graphics rendering. They tend to have hundreds or thousands of cores - they are optimised to operate in a SIMD structure (performing the same operation to different pieces of data, for example a rotation). This parallel structure makes them useful for other applications like password cracking, machine learning, and audio processing. They tend to have built-in instructions for common graphics operations. The SIMD structure is useful for graphics rendering since we often want to perform the same operation to many different vertices, so GPUs are faster for running graphical applications.
• Define "coprocessor"""


  An additional processor which runs alongside the main CPU. It is optimised to perform a specific task, for example performing graphical operations. It improves performance by executing concurrently with the main CPU.
• Name 3 types of processor.

  Scalar Vector (Array) Parallel
• What is a scalar processor?

  A scalar processor performs instructions on one piece of data at a time. They operate in SISD (Single Instruction Single Data)
• Describe a vector processor

  A vector processor is one which performs the same instruction to multiple pieces of data (SIMD). Example: GPU
• Describe a parallel processor.


  A parallel processor is one which uses multiple independent processors (cores) to execute one process. The process is split into tasks, each task can be executed by any one of the cores.
• Give 3 advantages of parallel processors

  -Makes maximum use of CPU -Not limited by bus transfer rate -Faster than one processor when handling lots of data
• Give 3 disadvantages of parallel processors

  -Only some problems can be optimised with parallel processors; those where component parts depend on eachother cannot be parallel processed -More costly, because more processing blocks are needed -Software is harder to write, a more complex OS is needed to communicate with multiple processors.
• Aside from RAM, Primary storage includes...

  -Cache -Registers -ROM
• What are the 3 levels of cache, what capacity is it and how fast is it to access?

  L1 - Fastest to access - Smallest capacity L2 - Medium time to access - Medium capacity L3 - Slow to access - Largest capacity (L3 is still faster to access than RAM)
• Describe ROM, what kind of memory is it and what is stored on it?

  ROM (Read-Only memory) is a fast-to-access unit of non-volatile memory that can only be read from and not written to. It is used to store the BIOS, firmware and bootloader.
• Describe cache memory and its purpose

  Cache memory is a volatile store of frequently used data and instructions. It is stored on or close to the CPU to reduce latency. The purpose of cache memory is to increase CPU performance by reducing the waiting time for the CPU to access data/instructions from RAM. Data and instructions are faster to access from cache than they are from RAM, hence if cache can be used more over RAM then overall performance will increase.
• Explain the terms: -Cache miss -Cache hit

  A "cache miss"" occurs when an instruction or a piece of data cannot be found in cache when needed. So a ""cache hit"" occurs when an instruction or piece of data can be found in cache, which is good because it means the CPU doesn't need to wait for the memory controller to copy it from RAM to the data bus."
• Give some differences between RAM and ROM

  - ROM is read-only; the data stored on it is fixed after the manufacture process and cannot be changed by the user, whereas RAM is read-write and can be changed. - RAM is volatile; the data stored on RAM will be lost when the computer loses power, whereas ROM is non-volatile and will keep the data stored on it after power is lost. - ROM is used to store the BIOS, bootloader and firmware, whereas RAM is used to store data and instructions relevant to programs that are currently being executed by the CPU - RAM has a much higher capacity than ROM.
• Explain what it means for a memory unit to provide "random access"" to data"

  Data can be accessed in constant time regardless of where the data is located on the unit.