Internal Computer Architecture

• The CU (Control Unit) coordinates all activities of the CPU, and controls the fetch-execute cycle.
• The Status Register contains information about the state of the processor in bits, which may indicate an interrupt
• The clock releases a signal at a regular frequency to synchronise components of the CPU
• The ALU or Arithmetic Logic Unit performs arithmetic and logic operations like mathematics or boolean eg AND, OR
• General purpose registers are parts of extremely fast memory that store data temporarily
• The PC (Program Counter) (not to be confused with personal computer) stores the memory address of the next instruction to be executed
• The MAR (Memory Address Register) stores the memory address that is to be read from or written to
• The MBR (Memory Buffer Register) or MDR temporarily stores the data read from or written to memory
• The CIR (Current Instruction Register) holds the current instruction being executed by the processor
• In von Neumann architecture, data and instructions share the same memory. The processor follows a linear fetch, decode, execute cycle
• Von Neumann architecture is used in general purpose computers
• In Harvard architecture, instructions and data each have their own memory, so instructions can be fetched and executed simultaneously
• Harvard architecture is used in embedded systems eg digital signal processing systems
• A processor executes program instructions to run applications. Often considered the brain of the computer
• Main memory, including RAM and ROM, contains instructions and frequently used data. Much faster than secondary storage
• A bus consists of parallel wires that connect internal components. The number of parallel wires is called its width and corresponds to how many bits can be transferred simultaneously
• The address bus transports memory addresses from the processor to memory. It only travels in one direction
• The more wires in an address bus, the greater range of addresses it can specify, thus increasing the addressable memory of the computer
• The data bus sends data and instructions between the processor and memory. It is bi-directional.
• The wider a data bus, the greater volume of data it can transfer in a given amount of time
• The control bus carries control signals between the processor and memory. It also carries the clock signal. It is bi-directional
• I/O controllers (input/output controllers) are hardware that control communication of data between the processor and external hardware devices
• Addressable memory is memory that can be accessed by its address
• An instruction consists of an opcode and an operand.
• An opcode specifies what operation is to be carried out. An operand is data that will be operated on.
• The stored program concept means serially fetching and executing machine code instructions stored in main memory by a processor that performs arithmetic and logical operations
• The stored program concept is employed to swap out different instructions, and is the foundation for running multiple different applications on the same device today
• The fetch-execute cycle is a continuous process. It consists of three stages: fetch, decode, execute
• Fetch:

  -Address of next instruction is copied from PC to MAR. This is sent through address bus to main memory.

  -Instruction at that address is returned through data bus to the MBR. PC updates to hold address of next instruction.

  -Contents of MBR are copied to CIR.
• Decode:

  -Instruction in CIR is decoded, split into opcode and operands

  -Opcode determines what hardware is needed to execute
• Execute:

  -Additional data is fetched if necessary

  -Instruction is carried out, possibly utilising ALU

  -Results of calculations stored in general purpose registers or main memory
• The instruction set of a processor refers to the machine code instructions that can be executed by the processor. This is specific to each processor, so they might not be compatible with other processors
• One bit in an instruction usually specifies the addressing mode. This dictates where to find relevant data
• Immediate addressing means the value specified by the operand is the actual value to be used. Memory does not need to be searched.
• Direct addressing means the operand refers to the memory address in which the relevant data can be found.
• In AQA assembly language, <operand> can be a value specified with # or the memory location of a value specified with R (basically addressing modes)
• You can create an if statement in AQA assembly language by using a conditional branch in conjunction with an unconditional branch
• STR (store) stores a value from a register into memory. LDR (load) loads a value from memory into a register
• An interrupt is a signal sent to the processor requesting attention. This could be sent by hardware or software. It is detected if the status register changes
• When an interrupt is detected, the processor stops the current task and services the interrupt using an interrupt service routine that is specific to that interrupt.