Structure and function of the processor

• CPU


  Central processing unit, is the primary component in a computer and acts as a control center
• ALU

  Arithmetic logic unit, performs arithmetic and logical operations on data
• CU

  Control unit, Cooridnates all activities of the CPU and sends control signals to direct the flow of data in the between the CPU and other devices
• PC

  Program counter, Holds the address of the next instruction to be executed
• ACC

  Accumulator, Holds the immediate results of an instruction and stores results from the ALU
• MAR


  Memory address register, stores the address of where the next instruction or data is to be fetched from or written to
• MDR

  Memory data register, temporarily stores data which has been read from or written to memory and is retrived from the MAR
• CIR

  Current Instruction register, holds the current instruction being executed and is split into operand and opcode
• Registers in the CPU

  Program counter, accumulator, Memory address register, memory data register, current instruction register
• Program counter function

  Holds the address of the next instruction to be executed. This can be the next instruction or the address to jump to an instruction
• Memory address register function

  Holds the address of the memory location from which data is to be fetched or written. These addresses are sent to memory by the address bus
• Memory data register function

  Used to temporarily store the data which is read from or written to memory. The data travels down the data bus and passes through the MDR
• Current instruction register function

  Holds the current instruction being executed. The contents of the MDR are copied to the CIR if it is an instruction. Contains opcode and operand
• Arithmetic logic unit function

  Performs all logical and arithemtic operations on data. For example, ADD, SUBTRACT, MULTIPLY, DIVIDE, Bitwise sifts, boolean logic
• Accumulator function

  A general purpose register where data or control information is often stored in them. The results of calculations in the ALU can be temporarily stored here
• Address bus

  Carries memory addresses that identify where the data is being read from or written to. Is uni-directinal
• Data bus

  Carries the binary 1s and 0s that make up the actual information being transmitted around the CPU
• Control bus

  Carries the command and control signals to and from every other component of the CPU
• Clock speed

  The number of instruction cycles a computer can fetch, decode and execute
• Clock speed's affect on CPU performance

  The faster the clock speed, the faster the computer can fetch, decode and execute instructions
• Cache

  Temporary storage of data and instructions that can be read to and written from
• Cahce size's affect of CPU performance

  The more cache memory there is, the more likley it is to not have to access main memory which is more time consuming
• Computer core

  A complete copy of the CPU
• Number of core's affect on CPU performance

  A computer that has multiple cores has multiple processing units which means the computer can run multiple programmes at the same time
• Disadvantage of multiple cores

  Cores need to coordinate with each other and the more cores a computer has, the more time it will take to communicate. Additinaly, many porgrammes aren't made for multi-core use
• How do computers carry out processes?

  By fetching instructions, decoding and then executing them
• Stages of the Fetch cycle

  1.The address of the next instruction is copied from the PC to the MAR.

  2. The address in the MAR is sent along the address bus to main memory where is waits to recieve a signal from the control bus.

  3. The contents in main memory travel along the data bus to the MDR and the contents are copied to the CIR

  4. The contents of the PC are incremented
• What are instructions made up of

  Opcode and operand
• What does opcode state

  What to do to the data
• What does operand state

  What data to do the operation to
• Stages of the Decode cycle

  1.Instructions are split into operand and opcode

  2. The ALU performs operations on the data

  3. The result is stored in the ACC or main memory
• Pipelining

  A method of processing instructions more efficiently. The CPU executes one instruction, whilst decoding a second and fetching a third.
• Instruction pipeline

  Consists of the various stages an instruction must move through the processor
• Arithmetic pipeline

  Consists of the parts of an arithmetic operation that can be broken down and overlapped as they are carried out
• What does pipeplining allow for?

  It allows for multiple instructions to be executed simultaneously
• Why might 'Flushing the Pipe' be needed?

  This may be needed in the instance of branching instructions in a code as some instructions may become redundant
• Von Neumann architecture

  In this architecture, instructions and data both share a memory space. Instructions and data also share the same system bus.
• Harvard architecture

  In this architecture, instructions and data each have separate storage spaces. Data and instructions also have separate system buses.
• Pros and cons of Von Neumann architecture

  pro: It is cheaper and simpler for CPU design

  con: It may run slower than Harvard architecture
• Pros and cons of Harvard architecture

  Pro: It is optimal when speed is the priority

  Con: It is more expensive