1.1.1 Structure and Function of the Processor (SLR01)

• The ALU: (A)rithmetic and (L)ogic (U)nit
• ALU is responsible for performing arithmetical operations such as addition, subtraction, multiplication and division
• ALU also performs logical operations on data such as AND, OR, NOT etc.
• the Cu
• Cu stands for control unit
• The Control unit does

  • Controling and coordinating the activities of the CPU
  • Managing the Flow of Data
  • Accepting the next instruction
  • Decoding instructions
• Program Counter (PC)


  Holds the address of the next instruction to be executed
• Accumulator (ACC)


  Stores the results from calculations
• Memory Address Register (MAR)


  Holds the address of a location that is to be read from or written to
• Memory Data Register (MDR)


  Temporarily stores data that has been read or data that needs to be written
• Current Instruction Register (CIR)


  Holds the current instruction being executed, divided up into operand and opcode
• The Buses

  • Set of parallel Wires which connect two or more components inside and out of the cpu
  • There are Three Buses in the cpu
• All the Buses Inside The CPU

  1. Data Bus
  2. Address Bus
  3. Control Bus
• Data BUS

  • Bi Directional Bus
  • Transporting Data And Instructions Between Components
• Assembly Language


  Uses mnemonics to represent instructions

  Simplified way of Representing Machine code
• in The CIR, Instructions are separated into

  • OPCODE (The Instruction)
  • OPERAND (The Data/Address)
• The Fetch Decode Execute Cycle and Registers are the 3 stages of the CPUs Operations To complete Each instruction
• Order Of the FEDEX Cycle

  FETCH

  1. Address From the PC Is Copied To the MAR
  2. Instruction At that Address Is copied to the MDR by the data bus
  3. Contents of the pc are incremented by 1
  4. value in MDR is Copied to the CIR

  DECODE

  1. The contents Of Cir are Split into Operand and Opcode

  EXCEUTE

  1. The Decoded instruction is executed
• Factors Affecting CPU Performance

  • Clock Speed
  • Number of Cores
  • Amount and Type of Cache
• How Does Clock Speed Affect the CPU?

  • The clock speed of the CPU determines how quickly the CPU can execute instructions.
  • It is Determined by the System Clock
  • Series of Alternating 1's and 0's
  • All processor Activities Begin on A Clock Pulse
  • Clock Speed is time taken for one clock cycle to complete
• Number of cores

  A core is an independent processor that is able to run its own fetch-execute cycle.

  A computer with multiple cores can complete more than one fetch-execute cycle at any given time.

  A computer with dual cores can theoretically complete tasks twice as fast as a computer with a single core.

  not all programs are able to utilise multiple cores efficiently as they have not been designed to do so, so this is not always possible.
• Amount And Type Of Cache memory

  Alters the Speed that the CPU can access data
• Levels OF Cache

  1. FASTEST MEMORY CELLS(2-64KB)
  2. RELITIVLEY FAST(256KB-2MB)
  3. MUCH LARGER AND SLOWER MEMORY CELL
• VON NEUMAN

  • Shared Memory
  • shared data bus
  • built on stored program concept
• separateHARVARD

  • Separate Cache for data and instructions
  • good for embedder processors
  • more control of speprate cache for different characteristics needed
  • EG instructions could be read only
• Von Neuman vs harvard

  Von neuman

  • Cheaper to develop as Control unit is easier to design
  • Programs can be optimised in size

  Harvard

  • Quicker Execution as data and instructions can be fetched in parallel
  • Memories can be different sizes which can make more efficient use of space