Interrupt Service Routine
1. The processor checks the contents of the interrupt register at the end of each Fetch-Decode-Execute cycle
2. If an interrupt exists that is of a higher priority to the process being executed, the current contents of the special purpose registers in the CPU are temporarily transferred into a stack
3. The processor then responds to the interrupt by loading the appropriate interrupt service routine (ISR) into RAM
4. A flag is set to signal the ISR has begun
5. Once the interrupt has been serviced, the flag is reset
6. The interrupt queue is checked again for further interrupts of a higher priority to the process that was originally being executed