Organisation & architecture

• Internal


  Inside CPU
• Processor


  • Executes program instructions in order to run applications
• Main memory


  • Uses RAM and ROM to store program instructions & frequently used data
• Buses


  • Series of parallel wires that connects internal components
• I/O Controllers


  • Pieces of hardware that control the communication of data between processor & external hardware devices
• External


  Input/output & storage devices
• Buses


  1. When CPU wants to access a particular main memory location, it sends address to memory on address bus

  2. The data in that location is then returned to CPU on data bus

  3. Control signal sent along control bus
• Control bus


  Bidirectional, carries control signals that regulate the operation of the computer system. Also carries the computer's clock signal.
• Data bus


  Bidirectional, sends data & instructions to & from the different components of the computer system
• Increasing the width of buses

  Increases the volume of data that can be transferred over the bus at any one time
• Address bus


  Unidirectional (away from CPU), transports memory addresses specifying where data is to be sent to or retrieved from
• Increasing the width of address bus


  Increases the range of addresses
• Von Neumann


  General purpose computer systems, instructions & data shared memory & buses
• Harvard


  Processor has 2 main separate memory locations for instructions & data, memories can have different characteristics
• Embedded systems


  • Special purpose computers e.g. DSP that take real-world signals like voice, audio, video, temp, pressure, or position that have been digitized and then mathematically manipulate them. A DSP is designed for performing mathematical functions like "add", "subtract", "multiply" and "divide" very quickly.
• Differences between Harvard and Von Neumann architectures

  • Faster - fetched in parallel/simultaneously, memory address structures can differ, length can vary, program cannot be (accidentally) overwritten (by data)
  • Slower - buses are shared
• Stored program concept


  Machine code instructions stored in main memory are fetched & executed serially by a processor that performs arithmetic & logical operations
• Role of CU


  • Controls operation of FE cycle, determines type of instruction, controls fetching/loading/storing operations, decodes instructions, executes (some) instructions, synchronises operation of processor, sends control signals/commands to other components, controls transfer of data between registers, handles interrupts
• CLOCK


  Generates timing signal which changes at a regular frequency, synchronises communication between components of processor & rest of computer system
• ALU


  • Coordinates & controls all the operations carried out - FDE
• PC


  • Holds address of next instruction to be executed
• CIR


  • Holds current instruction being executed
• MAR


  • Stores address of a memory location to be read or written to
• MBR/MDR


  • Holds contents of memory location that has been read from or data that is to be stored
• SR


  • Contains a number of bits - change to indicate the occurrence of an interrupt
• ACC


  Registers - memory cells that hold data temporarily operate at a very high speed
• General purpose register


  Can be used as storage for any data required by instructions
• Dedicated registers


  Specific registers for certain purposes
• Fetch-Execute cycle


  1. Fetch - next instruction to execute is retrieved from main memory, content of PC copied to MAR, instruction sent from main memory to MBR, PC incremented

  2. Decode - content of CIR decoded by CU & split into opcode and operands

  3. Execute - if necessary data is fetched, instruction is carried out, results stored in general purpose registers, SR updated
• Opcode


  The type of operation that is to be carried out: addition, subtraction or logical shifting
• Operands


  Pieces of data on which the operation is performed
• Addressing modes


  Immediate - operand is the value that the instruction should use, Direct - operand is the memory address
• Interrupts


  A signal sent to the processor to request immediate attention - when received, the processor suspends current task, runs the process associated with the interrupt, saves volatile environment, loads the appropriate ISR, restores the volatile environment and resumes execution
• ISR


  A series of instructions/mini program for handling the interrupt that is specific to the type of interrupt
• Reasons for interrupts


  • Hardware device has signalled that it has data to process
  • Hardware device has completed a task that it was asked to do
  • Software process needs a service to be provided or OS function to be performed
  • Division by zero or a stack overflow
  • An allotted amount of time has expired and an action needs to be performed
  • Hardware failure has occurred and needs to be addressed
• Cache


  Memory that can be accessed very quickly, used for storing frequently used data/instructions
• Larger cache size


  More data/frequently used instructions can be stored in cache over RAM, fewer fetches from main memory will be required, speeds up CPU access to these instructions
• It is faster to transfer to and from cache than transferring to and from RAM, data is transferred faster which makes a CPU more efficient</b>
• Internal components which could improve the performance of the computers

  • Cache
  • RAM
  • SSD/Hard drive
  • Graphics Card
  • Motherboard (NOT ROM, CPU)
• Factors affecting CPU performance

  • Hardware - Clock speed, Cache size, Number of cores, Word length, Address bus width, Data bus width, Architecture (Von Neumann vs Harvard)