Hardware

• RISC and SISC: Every computer uses Von Nueman Architecture but due to the advancement in computer technology, there is a much more complex processor design.
• RISC: Reduced Instruction Set Computer.

  CISC: Complex Instruction Set Computer.
• CISC (Hardware) is designed to carry out a given task with as few lines of assembly code as possible. Cisc processor is based on single instruction but complex, which need to be connected by the processor into a number of sub-operations to carry out the required operation.
• Features of CISC Processors: Cisc has more instructions as one instruction is made up of several instructions. It has few registers because most of the processing is done in the memory. Cisc's instructions are more complex. Cisc has many different instruction formats one thing can be done in different formats. Cisc uses multicycle instruction, one instruction breaks down in more intsructions. Cisc uses variable length instruction.
• Difference between fixed length or variable instruction: Fixed length instruction is a single instruction that is always executed in the same way. Variable Instruction is an instruction that can be executed in different ways depending on the value of a variable.
• CISC has poor pipelineablity, CISC requires more complex circuit to deal with the complex instruction. CISC has more addressing modes for example immediate, indirect, direct and index. CISC makes less use of RAM because of fewer instructions. CISC has a programmable control unit.
• Hardwired Control Unit uses a logical circuit and flip-flops. Programmable uses programs, code will compile, run and generate output.
• RISC has less instruction so higher performance from the processor. Processor doesn't need to break complex instructions down. Assembly Code is broken into a number of simpler single cycle instructions.
• Features of RISC Processors: RISC has fewer instructions, it also has many registers. RISC instructions are simpler, has few instruction format, usually uses single cycle instruction. RISC uses fixed length instructions and has better pipelineablity. RISC requires less complex circuit, RISC has fewer addressing modes, makes use of RAM. Has hard-wired control unit.
• Pipelining is a way of improving computer's performance.
• What is meant by Pipelining: Pipelining is instruction level parallelism, multiple operations are performed in a single cycle. Execution of an instruction is split into number of stages. When first stage for an instruction is completed the first stage of next instruction can start executing. Another instruction can start executing before the previous one is finished. Processing of a number of instruction can be done simultaneously.
• There are 5 stages of the processor this consists of the Instruction Fetch Cycle (IF), Instruction Decode Cycle (ID), Operand Fetch Cycle (OF), Instruction Execution Cycle (IE) and the Write Back Results Process (WB).
• The (IF) fetches instruction from memory, the (ID) translates the instruction, the (OF) fetches the data, the (IE) executes the instruction and (WB) stores data in required register in memory.
• OPCODE is what we need to do (Decode Instruction). The OPERAND is what we need to do to it.
• Interrupt: In pipelining there is one added complexity; as the interrupt is received there could be a number of instructions still in the pipeline. To deal with this you discard all instructions in pipeline except for the one in the final write back stage. Then the interrupt handler routine can be applied to the remaining instruction and once serviced the processor can restart with the next instruction.
• An alternative method to handle interrupt would be the content of the five stages being stored in a register, then the processor can be restored to its previous state once interrupt is serviced.
• Four Basic Computer Architecture: Flynn's classification which is based on number of instructions and data. Proccesser which deals with instruction and data. Instruction stream is a sequence of instructions executed by the processing unit. The Data Stream is a sequence of data or temporary result that will be called by the instruction stream.
• SISD refers to Single Instruction Single Data. SIMD refers to Single Instruction Multiple Data. MISD refers to Multiple Instruction Single data. MIMD refers to Multiple instruction Multiple Data.
• Parallel Processing is the ablility of brain to do many things at once.
• SISD the Single Instruction Single Data only has one processor, the processor executes one set of instructions on one set of data. Each task is processed in sequential order and does not allow for parallel processing.
• SIMD which is Single Instruction Multiple Data uses many processors, each processor has several ALU(Arithmetic Logic Units). Each ALU executes same set of instruction on different sets of data all at the same time.
• MISD which is Multiple Instructions Single Data has several processors, each processor executes different set of Instructions on one set of data at the same time.
• MIMD which is Multiple Instruction Multiple Data uses several processors with each processor execute different set of instructions and each processor operates on different sets of data.