Computer Science Dictionary

    Cards (117)

    • Central Processing Unit (CPU)

      General purpose processors that execute instructions in a computer system through the fetch-decode-execute (FDE) cycle. Each consists of: An Arithmetic Logic Unit (ALU), A Control Unit (CU), Registers and Buses
    • Arithmetic Logic Unit (ALU)

      Carries out arithmetic calculations and logical decisions. Acts as a conduit through which all I/O to computer is done and a gateway to and from the processor. The results of its calculations are stored in the Accumulator (ACC)
    • Control Unit (CU)

      Decodes and manages the execution of instructions using control signals to coordinate movement of data through the processor and other parts of the computer. Sends out signals to coordinate how the processor works. Synchronises actions using inbuilt clock. Controls FDE cycle and buses
    • Register
      Memory locations in the processor that temporarily store data and control information. They provide faster access to data than RAM for specific purposes during FDE cycle when frequent access is needed
    • Program Counter (PC)

      Controls the sequence in which the instructions are retrieved and executed and stores the address of the next instruction to be processed. Value is then sent to the MAR and the PC is incremented by 1 each FDE cycle after being read and is changed to address held in CIR if the operation is a Jump
    • Accumulator (ACC)

      Temporary storage of intermediate results in the ALU holds the data currently being processed during calculations. Deals with the I/O data in the processor and is used as a buffer. All arithmetic and logical operations use the ACC
    • General Purpose Register (GPR)

      Used to temporarily store data being used rather than sending data to and from the comparatively much slower memory
    • Memory Address Register (MAR)

      Contains the address of the next instruction or of the next location to be accessed in memory copied from PC or the address of next data item to be used copied from operand part of instruction from CIR
    • Memory Data Register (MDR)

      Contains the instructions of the memory location address specified in the MAR when being transferred between memory and processor. Receives data currently being used by the processor from memory location in address part of ACC. Acts as a buffer and copies data/instructions to CIR
    • Current Instruction Register (CIR)
      Holds the most recently fetched data/instructions to be decoded and executed into opcode and operand. Instruction contents are split into 2 component parts. Opcode is first part of instruction decoded so CU knows what to do and remainder of the instruction content is address of data to be used with the operation or actual data if immediate operand is used. Operand is coped to MAR if it is an address for accessing data to ACC or to MDR if it is data. Sends address to PC for jump instruction and determines the type of addressing to be used
    • Bus
      Parallel group of communication channel wires able to transmit data in groups of bits together from one register to another in the processor
    • Data Bus
      Carries the data being transmitted from one register to another between areas of the processor and memory. Two way because the direction carried is not specified
    • Address Bus

      Carries the memory location address of the register where the data is being transmitted to or from
    • Control Bus

      Transmits control signals from the CU to allow synchronisation of signals to the rest of the processor
    • Fetch-Decode-Execute (FDE) Cycle
      Fetch: The next instruction is fetched from the address held by PC in main memory into the processor. PC passes this address to MAR which provides the location sent along the address bus. PC is incremented in each cycle and the fetch signal is sent on the control bus. The contents of the memory location are sent from memory to the processor on the data bus and stored in the MDR. The contents of the MDR and ACC are sent to the ALU and the result is stored back in the ACC. Decode: Load instruction from address in MAR pointed to MDR. The instruction is copied from MDR to CIR. The instruction is decoded into opcode and operand by the CU in the CIR. Execute: The appropriate instruction opcode is carried out on the operand by the processor
    • Clock Speed
      The clock controls the process of executing instructions and fetching data. Processors have increasingly large clock speeds and can be overclocked to give more cycles per second so more instructions can be executed per second so the program takes less time to run. Increased clock speed is limited to smaller problems. Even doubling the clock speed would only halve the time taken
    • Number of Cores
      Each core is a distinct processing unit on the CPU. Processors can have multiple cores to speed up smaller problems. When multitasking, different cores can run different applications. Multiple cores can also work on the same problem
    • Cache
      Small memory that works much faster than main memory. By anticipating the data/instructions that are likely to be regularly accessed , the overall speed at which the processor operates can be increased. More space for data/instructions in cache memory. RAM needs to be accessed less frequently as accessing cache is quicker
    • Pipelining
      Would allow one instruction to be fetched as the previous one is being decoded and the one before that is being executed. Jump instructions do not pipeline well as they could be followed by one of many instructions determined at execution. This means the wrong one may be fetched or decoded so the pipeline would need to be flushed
    • Von Neumann Architecture
      The most common computer architecture. Single processor CU manages program control. Uses FDE cycle to execute one instruction at a time in a linear sequence. Program and data stored together in same memory format. Simple OS and easy to program but slow processing large sets of data
    • Harvard Architecture
      Data/instructions are stored in separate memory units with separate buses. So while data is being written to or read from the data memory, the next instruction can be read from the instruction memory
    • Contemporary Processor Architecture
      Modern high-performance CPU chips incorporate aspects of both Von Neumann and Harvard architectures
    • Complex Instruction Set Computer (CISC)

      More complicated processor design. Uses complex instructions. Each instruction may take multiple machine cycles. Does not allow pipelining. Instructions have variable format and number of bytes. Longer instruction set. Many instructions are available. An instruction can perform complex tasks so no need to combine multiple instructions. A task may be completed in a single machine cycle. Many addressing modes are available. Uses single register set. Does not have GPRs so needs to constantly send data to and from memory. Requires less RAM. Programs run more slowly due to complicated circuit. Integrated circuitry is more expensive
    • Reduced Instruction Set Computer (RISC)

      Simpler processor design. Uses simpler instructions. Each instruction takes one machine cycle. Allows pipelining. Instructions have fixed format and number of bytes. Smaller Instruction set. Limited number of instructions are available. An instruction performs a simple task so complex tasks can only be performed by combining multiple instructions. A task may take a number of machine cycles. Fewer addressing modes are available. Uses one or more register sets. Has GPRs to reduce the need to constantly send data to and from memory. Requires more RAM. Programs run faster due to simple instructions. Simple circuitry is cheaper
    • Graphics Processing Unit (GPU)

      Designed specifically for graphics so have built in circuity and instruction sets for calculations required in common graphics operations. Tend to have large number of cores so can run on highly parallelisable problems. Are able to perform the same instruction on multiple pieces of data at one time (SIMD) so are suited to processing graphics (e.g. transforming points in a polygon or shading pixels) which means it can perform transformations to onscreen graphics quickly. Are becoming a cost efficient way of tackling problems other than graphics processing including: subset of science/engineering problems, modelling physical systems, data mining, audio processing, breaking passwords, machine learning
    • Multicore Processor
      Have more than one processor incorporated into a single chip
    • Parallel Processing
      A computer carries out multiple computations simultaneously to solve a given problem. Uses multiple processors working together to perform a single job which is split into tasks so each task may be processed by any processor so the job is completed more quickly. Allows faster processing and speeds up arithmetic processes as multiple instructions are processed at the same time and complex tasks are performed efficiently. Parallel processing isn't suited to all to problems. Most problems are only partially parallelisable. Processors are controlled by a complex OS to adapt the sequential algorithms and ensure synchronisation. Programs may need to be written specially or rewritten in a suitable format so writing algorithms is more challenging and the program is more difficult to test/debug
    • SIMD (Single Instruction Multiple Data)

      The same instruction operates simultaneously on multiple data locations
    • MIMD (Multiple Instructions Multiple Data)

      Different instructions operate concurrently on different data locations
    • Input Device
      Peripheral devices used to pass data into the computer and allow the user to communicate with the computer, e.g. keyboard, mouse, scanner, microphone etc.
    • Output Device
      Peripheral devices used to report the results of processing from a computer to the user and allow the computer to communicate with the user, e.g. printer, speaker, monitor etc.
    • Storage Device
      Peripheral devices used to permanently store data when the power is switched off. There are three main categories of storage device: Magnetic, Flash and Optical
    • Magnetic Storage

      Uses magnetisable material and works by magnetic patterns being read off platters that mechanically spin at high speeds. They tend to have a high capacity at a low cost. They can be noisy due to parts moving at high speed and be susceptible to damage if moved quickly. They also require enough space for their moving parts. Examples include: HDDs, zip drives and magnetic tape (often used to back up servers)
    • Flash Memory
      Solid-state technology where data is stored on memory chips. These can have their contents erased and subsequently overwritten when an electrical charge is applied. They have no moving parts and therefore tend to have lower power consumption and higher read/write speeds than magnetic or optical media. They are not affected by their device moving so require less space and operate silently. They are however prohibitively expensive. Examples include: SSDs, USB memory sticks and Flash memory cards
    • Optical Storage
      Works by using a laser and by looking at its reflection. They tend to be cheap to distribute and fairly resilient. Examples include: CDs, DVDs and Blu-ray discs
    • Random Access Memory (RAM)
      Where the user files, applications software and OS currently in use are temporarily stored. The random aspect of it is that the processor can access its data locations directly and equally as quickly as any other data location. It operates at a much faster read/write speed than secondary storage media. It is volatile meaning it loses its contents when the power is off. It is editable meaning data can be written to and it allows user to alter saved contents of files in current use. It is large and reduces buffering
    • Read-Only Memory (ROM)

      Generally small memory that can be read from but not written to. A common use for it storing the OS and BIOS bootstrap program file to start up a computer quickly. It must not be deleted or amended unintentionally therefore is best stored on a read-only medium. It must be present in memory and immediately available when the computer is switched on therefore must be stored on a medium which is non-volatile meaning the contents of its memory are not erased when the power is off. ROM memory contents cannot be altered so there is no chance of the OS being accidentally or maliciously changed
    • Virtual Storage
      Combination of physical storage devices into a virtual single storage device. Remote storage and software. Accessible anywhere. No need to hire specialist staff or to back up. Security is someone else's responsibility
    • Systems Software
      Programs that control the hardware and operation of the computer system. Acts as an interface between the processor and the user and makes the hardware useable by the operator. Gives a platform to run and allow access to other software. Provides housekeeping software and manages applications
    • Operating System (OS)

      Set of software programs designed to manage the hardware of the system. A modern OS has several purposes: Controls the hardware of the system through software like resource management, hardware drivers, systems software, task management, scheduling, memory management, paging, segmentation and virtual memory. Acts a platform on which applications software can run and deals with issues that the software may have e.g. storage of files. Provides the operator with a suitable HCI to allow communication between user and hardware e.g. command line interface. Handles communications between computer devices using rules and protocols to govern communication e.g. across a network. Handles translation of code through compilers, interpreters, assemblers to translate HLL/LLL into machine code. Has many utility software programs used to carry out housekeeping tasks on the system to maintain the hardware. Uses job scheduling to provide fair access to processor according to set rules. Provides security to protect access to user files e.g. through a password system. Handles interrupts based on priorities
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