1.1.1

• harvard architecture

  how many memory locations and are what for

  2 memory location

  one for data

  one for instructions
• how is Harvard Architecture different to Van neuman

  the cache inside a mdoern processor is split into 2 storage locations for data and instruction, therefore accessed using Harvard style system
• In Harvard Architecture the instructions are kept in Read Only Memory(ROM), why

  instructions are often unchanging, so will be kept in ROM
• van neuman, how are the instructions fetched

  one at a time and executed serially.
• von neuman architecture,

  when was it designed

  in the 1940s by john von neuman
• von neuman, what does it work on

  the architecture works on the stored program concept
• what are the uses for Harvard Architecture

  Mainly used in digital signal processing applications such as:

  Medical body signal monitoring

  sonar
• what does the van neuman use

  one control unit, one arithematic logic unit, five registers and three buses
• clock speed:

  the higher the clock speed , the more pulses are sent per second, therefore...

  more instruction can be executed at the same amount of time
• cores, what do they share and what do they have of their own

  each core has their own ALU,CU but share access to cache and main memory
• factor 1:cores, what can it do

  each core of CPU is able to process instructions independantly
• factor 2:clock speed,what does it do

  the CPU's clock speed sneds a pulse at fixed intervals to trigger the next stage of FDE(fetch,decode..)cycle
• factor 3:cache memory, what is it

  small amount of fast memory inside the CPU
• how many factors are there

  3
• pipelining

  what is it

  a feature which allows m ore processor operations to take place in less time
• piplining is split into two pipelines, names

  instruction pipeline

  arithematic pipeline
• what does piplining ensure

  that processors is in use all at one time
• what is arithematic pipeline, and how it is performed

  divides up an arithematic operation into its indivisual steps, performed by overlapping each step
• what is idle processor

  processor typically complete one instruction after the other and move on, meaning that part of the processor are idle(lazy) while the instruction are being completed
• what is instruction pipeline

  As one instruction leaves the CIR

  pre fetch the next instruction and data and store in register

  ...the next one is ready to be loadeda and decoded
• what is the drawback of cache memory

  accessing RAM is a slow operation
• decode

  purpose in the cycle

  the control unit decodes the instruction and sends control signals to the component outside the CPU that needs to act
• the execute

  purpose

  the operation indicated by the instruction is performed by the appropriate component
• the fetch

  how does it work in the cycle

  the PC is incremented(increased)to point to the next instruction that will be needed when the cycle starts again
• the fetch

  what happens to the instruction stored in location held by the MAR...

  is copied to the MDR
• the fetch

  what is it

  the address of the nect instruction to be processed is copied from the PC to the MAR
• Buses, what are they and how many does a van neuman CPU have

  used to send and recieve data and instructions from main memory(RAM).

  van neuman CPU has 3 buses
• how many types of registers are there

  5 types of register
• type 1 bus is called data bus, what is it

  retrieves data and instructions from the main memory
• type 1 of register is accumulator(ACC),what does it do

  holds the result of calculations and operations performed by the ALU
• type 2 buses is called Address bus, what is it

  sends address to the main memory
• type 2 of the register is Memory Data Register(MDR), what is it

  Stores data that has been read or data that needs to be written
• type 3 of buses is called control bus, what is it

  sends control signals to other devices inside the computer system
• type 3 of register is Current Instruction Register(CIR), what is it

  is used to store the current instruction that the CPU is working on
• type 4 of the register is Program Counter(PC), what is it

  holds the memory address location of the next instruction to be perfomed by the CPU
• type 5 of the register is Memory Address Register(MAR), what is it

  holds the location address in memory where data is to be retrieved or stored.
• What are 3 of the jobs that a CU do

  -Controlling and coordinate the activities of the CPU

  -accepting the next instruction

  -decoding instructions
• what does arithmatics and logic unit(AIU) do

  performs all the arithematic and logical operaations of the CPU

  example:+- divide, multiply, Boolean...
• what does the control unit(CU) do

  sends out control signals to toher parts of the CPU
• what does the CU use to follow in order to execute program instructions

  by following the fetch-decode execute cycle.