Fetch-Decode-Execute Cycle

• Program Counter (PC) is a component in the CPU that stores the address of the next instruction to be processed.
• Memory Address Register (MAR) is a component in the CPU that holds the address of the data or instruction to be located in the RAM.
• Memory Data Register (MDR) is a component in the CPU that holds the data or instruction that are fetched from RAM.
• Control Unit (CU) is the component in the CPU that controls all the operations in the CPU.
• Current Instruction Register (CIR) is a register built into the CU that holds the current instruction that is being processed in the CPU.
• Arithmetic Logic Unit (ALU) is the component in the CPU that performs all the mathematical and logical operations required when processing data and instructions.
• Accumulator (ACC) - a register that is built into the ALU that stores the result of any interim calculations.
• Address Bus is the the wires used for the transmission of addresses between components in a computer.
• Data Bus is the wires used for the transmission of data and instructions between components in a computer.
• Control Bus is the wires used for the transmission of control signals between components in a computer.
• The fetch-decode-execute cycle is the cycle through which data and instructions are processed.
• Fetch is the stage where the instruction is fetched into the CPU.
• Decode is the stage where the instruction is decoded within the CPU.
• Execute is the stage where the instruction is executed by the CPU.