The control unitcontrols and coordinates the activities of the CPU and other components of the computer.
The three types of bus are:
Control bus
Address bus
Data bus
The memory address register holds the current location being accessed by the CPU.
The current instruction register contains the instructions currently being executed by the CPU.
The memory data register is used to store data that has been read from or written to main memory.
The arithmetic logic unit performs calculations such as addition, subtraction, multiplication, division, bitwise operations, and logical operations on binary numbers.
The accumulator is a temporary storage area where results of computations can be stored until they are needed elsewhere.
General purpose registers are used to hold frequently accessed data during program execution.
The ALU can also perform logical operations such as AND, OR, NOT and XOR.
The program counter keeps track of where the next instruction will be fetched from.
The control unit manages the fetching, decoding, and executing of instructions by the processor.
The purpose of the control bus is to transmit command, timing and specific status information between components.
The data bus provides a bi-directional path for moving data and instructions between components
The address bus transmits the address of the memory location to be accessed.
Fetch phase:
The address of the next instruction is copied from the program counter to the memory address register
The instruction is then copied into the memory data register. The content of the program counter is also incremented
The contents of the memory data register are copied into the current instruction register
An instruction is split into opcode and operand
The opcode tells the CPU the type of instruction to be carried out
The operand holds either:
The address of the data to be used
The actual data to be operated on
Factors affecting CPU performance:
Number of cores
Clock speed
Cache memory size
Clock speed is how many clock cycles the CPU does in a second
The number of cores is how many individual processors the CPU has
The larger the cache size the slower it is
The cache is immediate memory located on the CPU
Pipelining allows the processing core in the CPU to perform multiple instructions at the same time
In pipelining, the first instruction will be fetched. When the CPU starts to decode the instruction it will also fetch the second instruction at the same time.
When the first instruction starts to be executed, the second will be decoded and a third instruction will be fetched
State what is meant by the term register:
A general-purpose storage located on the CPU
The two main types of computer architecture are:
Von Neuman
Harvard
Von Neuman architecture
Shared memory unit for data and instructions
A single control unit follows a linearfetch-decode-execute cycle
Processes one instruction at a time
Registers are used as fast access to instructions and data
Instructions and data are stored in the same format
Harvard:
Instructions and data are stored in separate memory units
Each has its own bus
Reading and writing data can be done at the same time as fetching an instruction
Used by RISC processors
Another more modern architecture is known as contemporary architecture
SIMD (single instruction, multiple data)– Parallel processing is where a processor carries out a single instruction on multiple data items at the same time
MIMD (Multiple instructions, multiple data) - Another version where multiple instructions are carried out on multipledata items across several cores
Distributed computing – Where multiple computers on a shared network each take on a part of a bigger problem
CISC advantages:
Large number of complex instructions
Complier can do less work
Small code sizes and higher cycles per second
Makes more efficient use of RAM
Multiple addressing modes available
CISC disadvantages:
Has more complex hardware
Multiple clock cycles per instruction
Physically larger
Greater energy consumption
Can’t make use of pipelining
RISC advantages:
Has simpler hardware
Smaller number of simple instructions
Single cycle per instruction
Physically smaller in size
Lower energy requirements
Can use pipelining
RISC disadvantages:
Compiler must do more work
Large code size and less cycles per second
Heavy use of RAM
Fewer addressing modes available
A co-processor is an extra processor unit used to supplement the functions of the primary processor