When adding unsigned numbers, a carry-out of 1 from the most significant bit position indicates that an overflow has occurred. This is not always true when adding signed numbers. When adding two numbers in 2’s-complement representation, if both summands have the same sign, an overflow has occurred when the sign of the sum is not the same as the signs of the summands. When subtracting two numbers in 2’s-complement representation, overflow may occur only if the signs of A and B are different. Overflow occurs if the sign of the result, R, is different from the sign of A, or if the sign of the result, R, is the same as the sign of B.