The fetch decode execute cycle
1.The memory address held in the program counter is copied into the MAR.
2. The address in the program counter is then incremented - or increased - by one. The program counter now hold the address of the next instruction to be fetched
3. The processor sends a signal containing the address of the instruction to be fetched along the address bus to the computer's memory.
4. The instruction held in that memory address is sent along the data bus to the MDR.
5. The instruction held in the MDR is copied into the CIR.
6. The instruction held in the CIR is decoded and then executed. The results of processing are stored in the ACC.
7. The cycle then returns to step one