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compsci
systems architecture
fde cycle
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Cards (5)
label
A)
address
B)
program counter
C)
mar
D)
incremented
E)
1
F)
address of the next instruction
G)
fetched
H)
control unit
I)
signal
J)
address bus
K)
memory address
L)
instruction
M)
data
N)
data bus
O)
mdr
P)
copied
Q)
cir
R)
decoded
S)
executed
T)
acc
U)
program counter
21
label
A)
next
B)
memory
C)
fetch
D)
retrieve
E)
execute
F)
fetched
G)
stored
H)
executed
I)
result
9
The
control unit
decodes the instruction, determining which operation needs to be performed and which operands are involved.
address bus: sends a
memory address
(from
cpu
to
ram
) of where the data is
stored
data bus: transfers
data
between
both
components. data is sent
both
ways
control bus: sends
control signals
from the
control unit
to other components of the system.status signals are sent back to the cpu
During the execute stage ofthe cycle, the
CPU
will carry out the instruction that was fetched Some examples that would take place at this stage are
Performing a
calculation
Storing
a
result
or data back in main memory (
RAM
)
Going to
main memory
to
fetch
data from a differentlocation