Factors Affecting CPU Performance

Cards (11)

  • CPU performance
    The speed at which a Central Processing Unit (CPU) executes code
  • Factors affecting CPU performance
    • Clock speed
    • Cores
    • Cache memory
    • Pipelining
    • Idle processor
  • Clock speed
    • The CPU's clock sends a pulse at fixed intervals to trigger the next stage of the fetch, decode, execute (FDE) cycle
    • The higher the clock speed, the more pulses are sent per second, so more instructions can be executed in the same amount of time
  • Cores
    • Each core of a CPU is capable of processing instructions independently
    • Each core has its own Control Unit (CU), and Arithmetic and Logic Unit (ALU), but the cores share access to cache and main memory
    • Multiple cores allows a CPU to process multiple instructions at the same time
  • Cache memory
    • Cache memory is a small amount of very fast memory inside the CPU
    • In comparison to the cache, accessing the Random Access Memory (RAM) is a very slow operation
    • By storing frequently accessed data and instructions in cache memory we can avoid the process of accessing the RAM
  • Pipelining
    A feature which allows more processor operations to take place in less time
  • Idle processor
    Processors typically complete one instruction before moving on to the next, meaning parts of the processor are idle while the instruction is completed
  • Effect of pipelining
    Pipelines ensure as much of the processor is in use all at one time and increase efficiency of the computer system
  • Types of pipeline
    • Instruction Pipeline
    • Arithmetic Pipeline
  • Instruction pipeline
    • The instruction pipeline will pre-fetch the next instruction and data and store it in a register
    • As one instruction leaves the current instruction register (CIR), the next one is ready to be loaded and decoded
    • At any given point, there are instructions being fetched, decoded and executed
  • Arithmetic pipeline
    • The arithmetic pipeline divides up an arithmetic operation into its individual steps
    • Each step is performed overlapping the next step