Fetch-Decode-Execute Cycle

• Fetch:

  1. The PC contains the address of the memory location of the next instruction to be fetched
  2. The address is copied from the PC to the MAR via the address bus
  3. The contents of the memory location in the MAR are copied to the MDR
  4. The MDR contents are copied to the CIR and the PC is incremented to process the next instruction
• Decode: The instruction is now decoded so that it can be interpreted in the next stage of the cycle
• Execute:

  1. The CPU passes the decoded instructions as a set of control signals to appropriate computer components
  2. This allows each instruction to be carried out in a logical sequence