1. Instructions are fetched from RAM, to be decoded (understood) and executed (processed) by the CPU
2. The Program Counter (PC) register displays the address in RAM of the next instruction to be processed
3. The PC register is increased by 1 to prepare the CPU for the next instruction to be fetched
4. The CPU checks the address in RAM which matches the address held in the MAR
5. The instruction in RAM is transferred to the Memory Data Register (MDR)
6. The instruction in the MDR is copied into the Current Instruction Register (CIR)
7. The instruction in the CIR is decoded (understood) and executed (processed), with any result stored in the Accumulator (ACC) register
8. The cycle repeats by returning to the first step and checking the program counter for the address of the next instruction