Physical and Virtual Memory

• Each byte in main memory has a physical address. Physical addressing is an approach to accessing memory that assigns a unique number to each byte in memory.
• Virtual addresses are used by the CPU to reference data stored in RAM, while physical addresses are used by the computer's hardware to locate specific bytes within RAM.
• The process of converting a virtual address into a physical address is known as address translation.
• Modern systems typically support either 32-bit or 64-bit virtual address spaces.
• If there are n virtual address bits, then the number of virtual addresses is 2^n and the largest possible virtual address is 2^n-1 if the start address is 0.
• Virtual memory systems partition the virtual memory space into virtual pages. A page can be unallocated, meaning the page does not occupy any disk space. The page can be cached or uncached in physical memory (DRAM).
• One of the advantages of virtual memory is that it simplifies linking. Different sections of the ELF file always lie in the same location of virtual memory and allows the linkers to interface with a standardized address space without bothering with the physical address space.
• One of the advantages of virtual memory is that it makes it easier to share memory between processes. The operating system is capable to mapping multiple virtual pages to the same physical page in a virtual memory system.
• A disadvantage of virtual memory is that it requires additional hardware resources such as SRAM and cache controllers.
• Another disadvantage of virtual memory is that it adds latency when accessing data from main memory due to the need to translate virtual addresses to physical addresses.
• One of the advantages of virtual memory is that memory allocation is much simpler (albeit more time consuming). Thanks to page tables, when a program calls malloc (asking for more virtual memory), all the operating system has to do is update the page table and let the caching algorithm take care of the rest.
• If the page size is p bits, then an n bit virtual address contains p offset bits and (n-p) bits to represent the virtual page.
• An address translation is a mapping between virtual address space and physical address space. The mapping takes a virtual page and returns its corresponding physical page. If the virtual page doesn't have a mapping to a page in physical memory, then the mapping indicates this.
• The simplest form of address translation is called direct mapping or identity mapping. In this case, there are no page tables at all; instead, we simply use the lower p bits of the virtual address as the index into the physical memory array. This means that if two different programs happen to occupy the same virtual page, they will overwrite each other’s contents!
• In a virtual addressing system, the CPU interfaces with a memory management unit (MMU) by asking for virtual addresses. The MMU has address translation hardware equipped with a mapping algorithm that translates the virtual address to a physical address in DRAM.
• The virtual address is divided into a virtual page number (VPN) and a virtual page offset (VPO). The physical address is divided into a physical frame number (PFN) and a physical frame offset (PFO). The page table maps the VPN to a PFN. The VPO bits indicate the PFO bits.
• The size of a virtual page must be the same as the size of a physical page.
• Each virtual address stores 1 byte of memory.
• If a virtual page has been allocated, we say the VP is in swap.
• If we try to print a pointer, we get the virtual address, not the physical address.
• In the case of a page hit, the CPU hardware handles all the operations of address translation

  1. The processor generates a virtual address.
  2. The memory management unit uses the virtual page number to index the page table.
  3. In the case of a page hit, the valid bit will be set to 1, indicating that the memory associated with the virtual address has been allocated and cached.
  4. The MMU looks up the PPN associated with the provided VPN through the page table.
  5. The physical address is returned from main memory by concatenating the physical page number with the virtual page offset bits.
• Page fault handling

  1. Processor generates virtual address
  2. MMU uses virtual page number to index page table
  3. Valid bit set to 0 to indicate page not cached
  4. MMU triggers exception, transfers control to OS kernel
  5. Page fault handler selects victim page in DRAM
  6. Handler pulls page from disk, caches in DRAM, updates page table
  7. MMU indexes page table, returns physical page number to processor