Fetch Decode Execute Cycle

• Fetch Stage

  1. The Address of the next instruction is copied from the Program Counter to the Memory Address Register

  2. The instruction held at that address is copied to the Memory Data Register

  3. Simultaneously, the contents of the PC are incremented

  4. The contents of the MDR are copied to the Current Instruction Register
• Decode Stage

  1. The instruction held in the CIR is decoded

  2. The instruction is then split into an operand and an opcode to determine what type of instruction it is

  3. Additional data (if required) is fetched from memory

  4. The additional data is passed to the accumulator
• Execute Stage

  The instruction is executed and the result is held in the accumulator or stored in memory