CPET7 1.1

• Hardware Description Language (HDL)


  A set of notations, similar to software programming languages, used for modeling the logical function of digital circuits and systems
• HDLs allow you to


  1. Describe a circuit using words and symbols

  2. Develop software that can convert that textual description into configuration data

  3. Load configuration data into Programmable Logic Devices (PLDs) such as FPGAs and others
• Field-programmable gate array (FPGA)


  An integrated circuit designed to be configured as "field-programmable" by a customer or a designer after manufacturing
• FPGA


  • IOB- Input/Output Block (Programmable pins)
  • CLB- Configuration Logic Block (Programmable Gates)
• HDLs resemble high-level programming languages

  such as C or Python. Statements in HDL code

  involves parallel operation, whereas programming

  languages represent sequential operation.

  In programming languages, the processor will

  execute lines of code one at a time, following the top-

  to-bottom organization that we use when reading text

  on a page.

  In HDL code, we are describing digital hardware, and

  separate portions of this hardware can operate

  simultaneously, although the corresponding lines of

  code are written using a top-to-bottom organization.
• Abstraction


  An important concept in engineering design that allows us to specify how systems will operate without getting overburdened with specific implementation details
• Levels of abstraction

  • System Level
  • Algorithmic Level
  • Register Transfer Level
  • Gate level
  • Circuit Level
  • Material Level
• System Level


  • The behavior of a system is described by stating a set of broad specifications
• Algorithmic Level


  • The specifications begin to be broken down into sub-systems, each with an associated behavior that will accomplish a part of the primary task
• Register Transfer Level


  • The details of how data is moved between and within sub-systems are described. Also, data is manipulated based on system inputs
• Gate level


  • The design is described using basic gate sand registers (or storage elements). The gate-level is essentially a schematic (either graphically or text-based) that contains the components and connections that will implement the functionality from the above levels of abstraction
• Circuit Level


  • This level describes the operation of the basic gates and registers using transistors, wires, and other electrical components. such as resistors and capacitors
• Material Level


  • This level describes how different materials are combined and shaped to implement the transistors, devices, and wires from the circuit level
• DATA DESIGN FLOW

  The process of designing a circuit or system
• SPECIFICATION


  1. Describe the desired behavior of the circuit

  2. State the desired behavior of the design using broad, high-level specifications
• FUNCTION DESIGN


  1. Describe the high-level architecture of the design (e.g., block diagrams for inputs/outputs, subsystems)

  2. Describe the behavior (truth tables, state diagrams, and/or algorithms)
• SYNTHESIS


  Create the gate-level connection (schematic or netlist) of the design using the logic synthesis process (KMAPS or automated CAD tools)
• TECHNOLOGY MAPPING


  1. Select the logic technology that will achieve the specifications (CMOS ASIC)

  2. Manipulate the gate-level schematic into a form that is suitable for this technology
• PLACE AND ROUTE


  1. Arrangement of the components to minimize the area needed (board or chip)

  2. Wire all connections to minimize interconnection length and crossings
• VERIFICATION


  Once a technology is chosen and the routing is complete, the gate and wiring delays can be used to estimate whether the final design meets the timing and power consumption requirements of the original specifications
• Fabrication


  Once the design is verified, it can be implemented (ASIC, programmable device, board level, discrete parts)