From Notes

• Control Unit

  • Carries out instructions from programs stored in memory
  • Coordinates all components to work together
  • Sends memory read and write requests to main memory on the control bus
• Program Counter

  • Holds the address of the next instruction to be executed
  • Closely related to the MAR, as at the start of each FDE cycle, the address that is held in the program counter is copied to the MAR
  • If the current instruction Is a command to jump or branch, the address would be copied from the Current Instruction Register (CIR)
• Memory Address Register

  • Holds the address of a memory location, from which either: data or an instruction is to be fetched; or from which data is to be written
  • Sends address to memory down address bus
• Memory Data Register

  • Temporarily stores data which is read from or written to memory
  • All data to and from memory travels on the data bus and through the MDR
• Arithmetic Logic Unit


  • Performs arithmetic and logical operations on data
  • Often uses general purpose registers to temporarily hold the results of the accumulator
• Current Instruction Register

  • Current instructions are held here
  • The contents of the MDR are copied to the CIR if it's an instruction
  • Contains an Opcode and Operand(s) of the current instruction – the two parts that make up an instruction
• Opcode


  Specifies the operation that needs to be carried out
• Operand

  Holds either: the address of data to be used, which is then copied to the MAR, or the actual data to be operated on, which is passed on to the MDR
• Address Bus

  Carries memory addresses that identify where data is read from or written to
• Control Bus

  Carries command and control signals to and from every other component of the CPU
• Data Bus

  Carries binary 0s and 1s that make up actual information being transmitted around the CPU. It transmits instructions and data between the processor, memory and peripheral devices. The width of a data bus determines the number of different instructions and largest operands of a processor
• Fetch Decode Execute Cycle

  1. Fetch Stage: 1) The Address of the next instruction is copied from the Program Counter to the Memory Address Register

  2. The instruction held at that address is copied to the Memory Data Register

  3. Simultaneously, the contents of the PC are incremented

  4. The contents of the MDR are copied to the Current Instruction Register

  5. Decode Stage: 5) The instruction held in the CIR is decoded

  6. The instruction is then split into an operand and an opcode to determine what type of instruction it is. Additional data (if required) is fetched from memory

  7. The additional data is passed to the accumulator

  8. Execute Stage: 8) The instruction is executed and the result is held in the accumulator or stored in memory
• Components of Computer Hardware

  • Input
  • Processing unit
  • Output
• Essential hardware components

  • CPU
  • Memory
• Processing Speed of a Computer

  • Dependent on the speeds of the CPU, the memory and bus speed
  • The speed of one factor affects the speed of others
  • The performance of a computer is assessed using benchmarking
• Cores

  • A CPU consists of multiple processor units, which are also known as cored
  • Each core consists of a processor (the ALU and the CU) and registers
  • Computers can be dual, quad or more cores
  • As the number of cores increases, the computer has more power to execute multiple programs at once
  • When the number of cores increases, more communication channels must be used, which uses some speed, therefore even if the number of cores are doubled, the speed won't be doubled
• Cache Size

  • Cache is a small memory part that is closer to the CPU than the RAM is
  • Cache temporarily holds data and instructions that the CPU is likely to use more frequently
  • To reduce access time, the Control Unit checks the cache first before requesting instructions from RAM or main memory
  • As cache is closer to the CPU, it's faster to use cache rather than RAM
  • The presence of cache increases the speed of the CPU
• Cache Levels


  • Level 1: 8-64 KB, in CPU chip, fastest
  • Level 2: Bigger than Level 1 (usually 256-512 KB), between CPU and RAM, slightly slower than Level 1
  • Level 3: Bigger than Level 2 (Usually 1-8MB), between the CPU and RAM, but closer to RAM, slightly slower than Level 2
• Each core has its own Level 1 and Level 2 caches, but Level 3 is shared between multiple cores
• The bigger the cache, the further it is from the CPU, and therefore slower
• Clock Rate

  • Indicates the number of instructions processed by a CPU in a second
  • Clock rate is measured in megahertz (MHz) or gigahertz (GHz)
  • A 4GHz processor can perform about 4 billion instructions per second
  • A faster CPU needs more power, which generates heat. This heat is a form of power loss
  • The speed of a computer can be changed in the BIOS (Basic Input/Output System)
  • Increasing computer speed by changing clock speed is called overclocking
  • A CPU has circuitry limitations. If a computer is forced to work at a higher speed than its limit, the instructions might not get executed completely. This leads to data corruption and overheating
• Pipelining

  • The next required instruction is placed in a queue so it can be fetched next
  • The processor doesn't need to wait for the current execution process to be completed to fetch the next instruction
• Types of pipelining

  • Instruction Pipelining: The pipelining with respect to instructions, that involves fetching instructions in a queue to perform the FDE cycle
  • Arithmetic Pipelining: The type of pipelining that involves breaking an arithmetic instruction into equal parts and overlapping them as they're performed
• Limitations of pipelining

  • Consider branching instructions (conditions eg if statement) such as Jump If Carry (JIC). In case of carry in an addition operation, the PC skips certain instructions and points to address specified JIC instruction
  • In this case, pipelining may not work
  • Instructions in current pipes are flushed off
  • Flushing pipes and refilling them reduces the positive effects of pipelining
• Words

  • Refers to the amount of data that can be handled at one time by a processor
  • Word length is usually 8, 16, 32 or 64 bits
  • Each word has a separate memory address
• Word Size


  • Each word has its own specific address
  • In case of read and write operations, its important to know the address of the memory location
  • The address bus transmits this address
  • The width of the address bus may be 8, 16, 32 or 64 depending on the type of the processor
  • The width of the address bus plays an important role in determining the maximum possible memory capacity of the system
• How word length affects the computers features

  • Determines the size of a bit pattern that can be transferred to or from main memory in one operation
  • The size of the processor registers are designed to be the same as the word length
  • The width of the data bus is equal to the word length
  • Typically each addressable memory location in the main memory is the size of a word. This means that each word is identified by a unique address. This type of design is called "word addressable"
• Little Man Computing Instruction Set

  • Load (LDA 5xx)
  • Store (STA 3xx)
  • Add (ADD 1xx)
  • Subtract (SUB 2xx)
  • Input (INP 901)
  • Output (OUT 902)
  • End (HLT 000)
  • Branch if zero (BRZ 7xx)
  • Branch if zero or positive (BRP 8xx)
  • Branch always (BRA 6xx)
  • Data storage (DAT)
• Little man computer


  A simulator that models the basic features of a computer that uses Von Neumann architecture
• Advantages of Assembly Language

  • Allows complex jobs to run in a simpler way
  • Requires less memory
  • Mainly hardware oriented
  • Requires less instruction to get a result
  • Less execution time, so faster
  • Used for critical jobs
  • Not required to keep track of memory locations
• Disadvantages of Assembly Language

  • Takes a lot of time and effort to write the code for the same result
  • Very complex and difficult to understand
  • Syntax is difficult to remember
  • Isn't very portable between different computer architectures
  • Needs more size or memory to run long programs written in assembly language
• Differences between low level and high level language

  • Most computer programs are written in high level language
  • Low level language is faster to process
  • High level language is faster to write
  • High level language is easier for programmers to understand
• Low level language

  • Machine oriented
  • Can only be executed by a processor of the same type that it was written for, making it non-portable
  • Two types (machine and assembly language)
  • Has a 1 to 1 relationship with the processor
  • Allows for individual control of processors components and registers
  • Typically less memory required, and executes faster than a high level language
• Addressing Mode

  • In machine code, an addressing mode is specified as part of the opcode of an instruction
  • The addressing mode specifies the way in which the operand will be interpreted
  • If code 01 represents immediate addressing, the operand will be interpreted as a data value
  • There are different types of addressing mode. You must learn 5 of them
• Low level language

  Machine oriented, can only be executed by a processor of the same type that it was written for, making it non-portable, has a 1 to 1 relationship with the processor, allows for individual control of processors components and registers, typically less memory required, and executes faster than a high level language
• High level language

  Most computer programs are written in, faster to write, easier for programmers to understand
• Differences between low level and high level language

  • Low level language is faster to process
  • High level language is faster to write
  • High level language is easier for programmers to understand
• Addressing mode

  In machine code, an addressing mode is specified as part of the opcode of an instruction, the addressing mode specifies the way in which the operand will be interpreted
• Types of addressing mode

  • Immediate Addressing
  • Direct addressing
  • Indirect Addressing
  • Indexed Addressing
  • Relative Addressing
• Immediate addressing

  Operand specifies the value that will be used in the operation