1.1.1 Structure and Function of the processor

Cards (51)

  • Arithmetic and Logic Unit (ALU)
    A register in the CPU which stores the intermediate result of arithmetic and logical (1 or 0) calculations.
  • Registers
    Tiny areas of extremely fast memory located in the CPU, normally designed for a specific purpose, where data and instructions are temporarily stored.
  • Program Counter (PC)
    A register in the Control Unit which holds the address of the next instruction to be executed.
  • Accumulator (ACC)
    A register within the ALU which holds the data currently being processed by the CPU. Any data to be processed is stored temporarily in the ACC.
  • Memory Address Register (MAR)
    A register in the CPU that stores the address of the memory location currently in use.
    Fetch Phase:
    • Address of instruction being loaded.
    Execute Phase:
    • Address of data being used.
  • Memory Data Register (MDR)
    A register that contains the data to be stored, or the data after a fetch from storage. It acts like a buffer and holds anything that is copied from the memory.
  • Current Instruction Register (CIR)
    A register in the Control Unit that stores the address of the instruction currently being executed and decoded.
  • Bus
    A bi-directional physical pathway shared by signals to and from several components of a computer.
  • Control Bus
    A bi-directional bus made up of discrete wires, each having a specific function:
    • Memory Write: data on the bus written into addressed location.
    • Memory Read: data from addressed location placed onto bus.
    • Interrupt Request: clock used to synchronise operations.
  • Data Bus
    A bus that carries data or instructions between the CPU and memory or Input/output devices, and vice versa.
  • Address Bus
    A bus that carries an address, for the data being read or written, to the system memory or Input/output devices.
  • Assembly Language
    A low-level programming language in which a mnemonic represents an individual machine language instruction (opcode) and operands.
  • Opcode
    The collection of bits that represent basic operations such as add, subtract, store in assembly, etc.
  • Operand
    The data or memory location used in an assembly language instruction.
  • Central Processing Unit (CPU)
    • The primary component of a computer that processes data/instructions.
    • Generic processing unit.
    • Better at performing complex operations on small data sets.
  • ADD
    Add in assembly language.
  • SUB
    Subtract in assembly language.
  • STA
    Store in assembly language.
  • LDA
    Load in assembly language.
  • BRA
    Branch always in assembly language.
  • BRZ
    Branch if zero in assembly language.
  • BRP
    Branch if positive in assembly language.
  • INP
    Input in assembly language.
  • OUT
    Output in assembly language.
  • HLT
    End program in assembly language.
  • DAT
    Data location in assembly language.
  • Fetch Decode Execute (FDE) cycle
    The complete process of retrieving an instruction from storage, decoding it and carrying it out.
  • What is a computer?
    An electronic device that takes an input, processes data, and delivers output.
  • Fetch
    1. PC checked as it holds address of next instruction.
    2. Address stored copied into the MAR.
    3. Address sent on address bus to main memory.
    4. CU sends a read signal on control bus to main memory.
    5. Data stored at 0000 address sent on data bus to the MDR.
    6. Data in MDR gets copied into the CIR.
    7. PC increments so the address it contains points to the next instruction.
  • Decode
    • The instruction in the CIR is decoded by the decode unit.
    • The instruction is made of 2 parts:
    • Opcode - what to do
    • Operand - what to do it to
  • How many different opcodes are available for a 4-bit opcode?
    2^4 = 16
  • Execute
    1. The address 0101 is sent to the MAR.
    2. The address in the MAR is sent on address bus to main memory.
    3. The CU sends a read signal on control bus to main memory.
    4. The data stored at 0101 address sent on data bus to MDR.
    5. Contents of MDR copied to the ACC.
  • Factors affecting CPU performance:
    1. Clock speed
    2. Number of cores
    3. Cache size
    4. Cache speed
  • Clock Speed
    • It's the frequency at which the internal clock generates pulses.
    • Measured in Hertz (Hz) = number of cycles per second.
    • Modern processors: billions of cycles per second = Gigahertz (GHz).
    • 3.2 GHz = 3.2 billion instructions fetched per second.
  • Cache
    An area of fast memory which stores previously used instructions.
    • Getting instructions from memory unnecessarily = costs time.
    • Located on or near CPU = faster than RAM.
  • Core
    A processing unit which reads instructions and executes them. Like a mini CPU.
  • A quad-core processor would have 4 separate processing units, each with its own:
    1. Registers
    2. ALU
    3. ACC
    4. CU
  • Number of Cores 

    The more cores a CPU has, the more programs that can be run at once. However, doubling the number of cores doesn't double the speed of the CPU.
  • Level 1 Cache
    • Very fast
    • Small capacity (2 KB - 64 KB)
  • Level 2 Cache
    • Relatively fast
    • Medium Capacity (256 KB - 2 MB)