IC FABRICATION

• Semiconductor manufacturing

  Generally divided into two sections: "front-end or Front-of-Line" focused on wafer fabrication, and "back-end" or End-of-Line" which involves the assembly of an integrated circuit
• Front-End or Front-of Line Steps

  1. Wafer Preparation

  2. Wafer Epitaxy

  3. Photolithography

  4. Etching

  5. Doping

  6. Deposition

  7. Oxidation

  8. Diffusion

  9. Annealing

  10. Chemical Mechanical Polishing (CMP)

  11. Metrology and Testing

  
• The Front End of semiconductor manufacturing involves a series of complex steps aimed at laying down the foundational structures of semiconductor devices
• Back-end OR End-of-Line Steps

  1. Dicing

  2. Wire bonding

  3. Molding
• After dicing, wire bonding, and molding, semiconductor products undergo an inspection process before being shipped

  
• IC Packaging Techniques


  • Transistor-Outline Package
  • Flat Pack
  • Dual Inline Package (DIP)
• Transistor-Outline Package


  • Leads normally number between 2 and 12, with 10 being the most common for IC applications
  • Provides protection for the device
• Flat Pack


  • Available in square, rectangular, oval, and circular configurations with 10 to 60 external leads
  • Made of metal, ceramic, epoxy, glass, or combinations of those materials
• Dual Inline Package (DIP) assembly

  1. Integrated-circuit die is sandwiched between two ceramic elements

  2. Kovar lead frame is stamped and bent into final shape

  3. Die is mounted in the well and leads are attached

  4. Top ceramic elements are bonded to the bottom element
• Dual Inline Package (DIP)

  • Easily inserted by hand or machine
  • Require no spreaders, spacers, insulators, or lead-forming tools
  • Standard hand tools and soldering irons can be used to field-service the devices
• Ceramic DIPs are the most common of the two package types (ceramic and plastic) to be found in Navy microelectronic systems
• Flip-chip mounting


  Conductive patterns are evaporated inside the package before the die is attached, connecting the external leads to bonding pads on the inside surface of the die
• Beam-lead technique


  Semiconductor circuit elements and integrated circuits are batch-fabricated with electrodes extended beyond the edges of the wafer

  
• Manufacturers are producing DIPs with up to 64 pins due to LSI and VLSI, while retaining all the advantages of the DIP