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• Counter


  A sequential circuit that simply counts, starting from a certain number and ending at a certain number depending on the design
• Counter


  • The number from which it starts counting and the number at which it ends the count depends on the design
  • Can be designed to count from 0 to 10, 2 to 6, 3 to 9, etc.
• Working of counter circuit

  1. Uses JK flip-flops

  2. Clock signal is given to first flip-flop

  3. Output of first flip-flop is used as clock for second flip-flop

  4. Frequency of output signals is divided by 2 for each additional flip-flop
• For p number of flip-flops with J=1, K=1 and negative edge triggered, the frequency is divided by 2 to the power p
• Counter examples


  • Counter counting from 0 to 3
  • Counter counting from 0 to 15
• Counting in counter


  • Determined by the values of QA and QB (or QD, QC, QB, QA for a 4-bit counter)
  • 0 0 = 0 clock pulses, 0 1 = 1 clock pulse, 1 0 = 2 clock pulses, 1 1 = 3 clock pulses
• Asynchronous counters


  Also called ripple counters
• Synchronous counters


  Also called same crona's counters
• Asynchronous counters


  1. External clock signal is applied to one flip-flop

  2. Output of preceding flip-flop is connected to clock of next flip-flop
• Synchronous counters


  All flip-flops receive external clock pulse simultaneously
• Types of counters


  • Up counters
  • Down counters
  • Up/down counters
• Up counters


  Count from small to large, output goes high with each clock pulse
• Down counters


  Count from large to small, output goes low with each clock pulse
• Up/down counters


  Combination of up and down counting
• Asynchronous counter


  The clock is not given simultaneously to all the flip-flops used, but the output of the first flip-flop will act as the clock for the next flip-flop
• Up counter


  Counting from the lower value to the higher value with each clock pulse
• 1. bit asynchronous up counter


  • Uses 3 flip-flops (A, B, C)
  • Clock is given to flip-flop A
  • Output of A is clock for B, output of B is clock for C
  • J and K inputs of all flip-flops are set to 1 for toggling
• Counting in 3-bit asynchronous up counter

  1. Start at 000

  2. Count up to 111

  3. Then wrap around back to 000
• Number of states in an n-bit counter = 2^n
• Maximum count in an n-bit counter = 2^n - 1
• The 3-bit asynchronous up counter counts from 0 to 7 and then wraps around back to 0
• 1. bit asynchronous up counter


  1. Flip-flops are asynchronous

  2. Clock is not given simultaneously to all flip-flops

  3. QA output is clock for B flip-flop

  4. QB output is clock for C flip-flop

  5. QC output is clock for D flip-flop
• Asynchronous counter


  Flip-flops are not clocked simultaneously
• T flip-flop


  Requires toggling, used instead of JK flip-flop
• Number of flip-flops is 4 for a 4-bit asynchronous counter
• 1. Design 3 bit up counter.
  2. Design 3 bit down counter.
  3. Design 3 bit up down counter.
  4. Design 4 bit up down counter.
  5. Design 4 bit up and down counter separately.


  look through your notes and yt= neso academy
• 1. Design MOD - 5 counter with state and timing diagram.
  2. Design MOD - 10 counter asynchronous counter with state and timing diagram.
  3. Design MOD - 10 down asynchronous counter with state and timing diagram.
  4.  Design MOD-7 counter with state and timing diagram.


  look through old notes and extra notes as well as utube
• 1.  Design 3 bit synchrnous up counter with state and timing diagram
  2.  Design 3 bit synchronous down counter counter with state and timing diagram


  look through old notes and utube
• Design johsons counter


  utube