COMPUTER ORGANISATION + ARCHITECTURE

Cards (33)

  • Processor
    Executes program instructions in order to run applications. Contain an ALU, control unit and registers.
  • Main memory
    Random access memory (RAM) and read only memory (ROM) used to store program instructions and frequently used data. Much faster than secondary storage so storing data here helps processor execute instructions quickly
  • Bus
    Series of parallel wires connecting internal components to allow signals to pass between them.
  • Width
    Number of parallel wires in a bus, has direct relationship to the number of bits that can be transferred simultaneously by the bus.
  • Address bus
    Used to transport memory addresses specifying where data should be sent to/fetched from. Increasing width increases range of addresses it can specify, increasing computers amount of addressable memory. Number of addressable memory locations = 2^n if n is number of parallel wires. Unidirectional.
  • Addressable memory location
    Portion of memory that can be accessed by its address. If there are not enough available, some portions may go unused
  • Data bus
    Sends data and instructions. Increasing width increases volume of data that can be transferred at any one time. Bidirectional.
  • Control bus
    Carries control signals that regulate operation of the computer system and carries the clock signal. Bidirectional.
  • I/O controllers
    Hardware that control the communication of data between processor and external hardware devices
  • Von Neumann architecture
    Instructions and data are stored together in the same memory and share buses for fetching both instructions and data, causing systems to perform worse due to bottlenecking and data can be processed as instructions vice versa. Used in general purpose computers e.g. laptops and smartphones
  • Harvard architecture
    Processor uses 2 separate memory locations for instructions and data, reduces bottlenecking and limits errors. Allows different characteristics e.g. memory used for instructions may be read only so they cannot be altered. Used in embedded systems e.g. digital signal processing
  • Stored program concept
    Serially fetching and executing machine code instructions stored in main memory by a processor that performs arithmetic and logical operations
  • Stored program concept allows computer to switch out one set of instructions for another stored in main memory to run multiple different applications.
  • Arithmetic logic unit (ALU)

    Performs arithmetic and logic operations e.g. addition, AND, OR
  • Control unit
    Responsible for controlling components of processor and FDE cycle
  • Registers
    Small storage locations used to hold data temporarily. Have high read and write speeds.
  • General purpose registers

    Can be used as storage for any data that is required by instructions during execution.
  • Special purpose registers
    Assigned to the storage of specific information and include PC, CIR, MAR, MBR, SR.
  • Program counter (PC)

    Holds memory address of the next instruction to be executed in FDE cycle
  • Current instruction register (CIR)

    Holds instruction currently being executed by processor
  • Memory address register (MAR)

    Holds memory address of the memory location being read from / written to
  • Memory buffer register (MBR) / memory data register (MDR)

    Holds contents of the memory location being read from / written to
  • Status register (SR)

    Holds number of bits, values which can change to indicate occurrence of interrupt
  • Processor instruction set
    Group of instructions it can carry out. Each processor has its own set so instructions for one may not be compatible with others. Stored in machine code and consist of opcode and one or more operands.
  • Opcode
    Specifies the type of operation to be carried out
  • Operands
    The pieces of data on which the operation is performed
  • Immediate addressing

    The actual value
  • Direct addressing

    The memory address of the value
  • Hardware interrupt
    E.g. I/O controller informing processor that mouse has been moved/keyboard key has been pressed
  • Software interrupt
    E.g. unexpected error like divide by 0 or stack overflow
  • Interrupts are detected as changes in the content of the SR between the fetch and execute stages of the FDE cycle
  • Vectored interrupt method
    Way of handling interrupts. When interrupt occurs, processor stops executing current program and places register contents onto system stack to save the volatile environment. Then loads interrupt service routine- instructions for handling specific interrupt. When fixed it restores volatile environment and resumes execution.
  • Factors affecting processor performance
    • Number of cores
    • Cache memory
    • Clock speed
    • Word length
    • Address bus width
    • Data bus width