Fetch-decode-execute cycle
1. Memory address held in program counter copied into MAR
2. Program counter incremented by 1
3. Processor sends signal along address bus to memory address in MAR
4. Instruction/data held in that memory address sent along data bus to MDR
5. Instruction/data held in MDR copied into CIR
6. Instruction/data held in CIR decoded and executed
8. Cycle returns to step 1