Has the address of the first instruction of the fetch-execute cycle and stores the memory location reference of the next instruction to be fetched; automatically incremented by 1 every time an instruction is fetched
Instruction Register (IR)
Temporarily stores the current instruction to be decoded and then executed
Arithmetic Logic Unit (ALU)
Carries out the logical part of the instruction, for example, a calculation
Memory Address Register (MAR)
Temporarily stores the address of the current instruction or data being executed
Fetch-Execute Cycle
Locates a program instruction from internal memory, decodes the instruction, and carries out the action required; this process is then repeated for the rest of the program instructions
Registers involved in the fetch-execute cycle
Program Counter
Memory Address Register (MAR)
Memory Data Register (MDR)
Instruction Address Register (IAR)
Arithmetic Logic Unit (ALU)
Memory Data Register (MDR)
Temporarily stores data being fetched from or written to the main memory of the CPU
