Lesson 2

• Instruction cycle is an important topic in computer organization and architecture. All computer software is built up of sets of instructions. Instructions are encoded in binary or machine code. Instruction cycle

  is the time required by the CPU to execute one single program instruction.
• Instruction cycle is the basic operation of the CPU which consist of three steps: fetch-decode-execute.
• The program instructions are stored into the main memory. The computer memory is organized into

  number of cells. Each cell (location) has a specific unique memory address.
• The computer system needs a set of instructions which directs the computer to perform the desired operations. This set of instruction which computer interpret and execute is called a computer program.
• Instruction format defines the layout and structure of the program instruction that can be decoded by the

  CPU and then perform the desired operation on the data.
• Operand is the part of the machine instruction that specifies either the data itself or a reference

  to the data such as memory address which contains the actual data. Operand simple means the

  data on which the CPU performs the desired operation.
• Opcode is part of the machine instruction that specifies which operation to be performed by the

  CPU while executing the instruction. Opcode directs the control unit of the CPU to operate on

  the data (operand) as supported by the instruction of the processor chip.
• The CPU contains

  • a number of registers, some of which fall on the address side, others on the data side;

  • an arithmetic logic unit;

  • the control section or control unit;

  • connections to the memory (a large unit of storage) by two buses, the uni-directional address bus

  and the bi directional data bus; and

  • internal buses or data pathways which allow the output of one register to connect to the

  • input of another.
• Control unit – Controls the operation of the CPU and hence the computer. The Control Unit is

  responsible for the timing and execution of the various register transfers required to fulfill an

  instruction held in the IR It has a number of control lines coming out of it, which transmit CSL

  and CSP levels and pulses to the various registers and logic units.
• Arithmetic logic unit (ALU) – Performs the computer’s data processing. The Arithmetic Logic

  Unit is responsible for bit operations on data held in the AC and MBR and for storing the results

  It contains arithmetic adders, logical AND-ers and OR-ers and so on A special requirement in our

  architecture is a “null operation” or “no op” which simply allows the output of the AC to appear

  at the output of the ALU.
• Status Register – or also known as Condition Control Word or Status Word, is closely associated with the ALU. It is not quite the same as the other registers in that it just a collection of 1-bit flags that indicate the outcome of operations that the ALU has just carried out. There are the flags (you met in P2) Carry Overflow V flags, negative flag N, and zero flag Z These are monitored by the CU.
• CPU REGISTERS

  Program Counter (PC) – contains the memory address of the next instruction to be fetched. Connected to the internal address bus, the Program Counter holds the address in memory of the next program instruction. Notice that it does not connect directly to the memory, but must go via the MAR. The PC is special as it is both a register and a counter.
• CPU REGISTERS

  Memory Address Registers (MAR) – contains the memory address of the current instruction to be fetched. The Memory Address Register is used to store the address to access memory.
• CPU REGISTERS

  Memory Data Registers (MDR/MBR) – contains the instruction/data after it is fetched from main memory. Others calls it as Memory Buffer Register that stores information that is being sent to, or received from, the memory along the bidirectional data bus.
• CPU REGISTERS

  Accumulator (ACC/AC) – contains the result of any calculations carries out in the ALU. The Accumulator is used to store data that is being worked on by the ALU, and is the key register in the data section of the CPU. Notice that the memory cannot access the AC directly. The MBR/MDR is an intermediary.
• CPU REGISTERS

  Current Instruction Registers (CIR/IR) – Also known as Instruction Register (IR) contains the instruction/data to be decoded. When memory is read, the data first goes to the MBR If the data is an instruction, it gets moved to the Instruction Register.
• The IR has two parts:

  • IR (opcode) – The most significant bits of the instruction make up the opcode. This is the genuine instruction part of the instruction, that tells the CPU what to do. The instruction in IR (gets decoded and executed by the control unit, CU.
• The IR has two parts:

  IR (address) – The least significant bits of the instruction are actually data. They get moved to IR (As the name suggests they usually form all or part of an address for later use in the MAR (in immediate addressing they are sent to the AC.
• Stack Pointer (SR) – it is connected to the internal address bus and is used to hold the address of a special chunk of main memory used for temporary storage during program execution.
• All Registers – these are edge triggered D types we will use falling edge triggered devices. For all their fancy names, the registers comprise nothing more than a row of D type latches which share a common clock input providing temporary storage on the CPU In our design they are falling edge triggered (hence the circle on the clock input) Because these registers output onto buses they have tri state buffers are connected to a single input OE, for “Output

  Enable”.
• Data – Microcontrollers have data bus widths of 4 bits, 8-bits, 16-bits and 32-bits, while the most advanced PCs use 64 bits. In these lectures we will assume that the “memory width” is 16 bits or

  2 Bytes. This means that each location can store 2 Bytes. We will also assume that the data bus is 16 bits wide, and the MBR and AC registers on the data side of the CPU are therefore also 16 bits

  wide. The ALU is also 16 bits wide.
• Address – The address bus does not have to be the same width as the data bus. The width on

  CPUs over time has increased in step with contemporary memory technology, with the Intel 8086

  (from 1979) having n = 20 address lines to current processors having n = 36 − 40.
• The IR is special. The IR (opcode) part should be wide enough to take the largest opcode. We assume the opcode is a fixed 8 bits wide, allowing 256 different instructions — which is plenty enough. The IR (address) part must have the same width as the address bus, 24 bits. So, the whole IR is 32 bits wide. It is however fed from the internal data bus which is only 16 bits wide in our architecture.
• Fetch-Decode-Execute cycle is the time period of which the computer reads and processes the

  instructions from the memory, decodes them, and executes them. This process is a continuous cycle which

  is used until the computer is turned off or there are no more instructions to process.
• Fetch – the next instruction from memory into the instruction register

  Decode – the instruction (that is, work out which it is)

  Execute – the instruction
• Fetching and an Executing an instruction simply require the CPU’s Control Section to issue Levels and Pulses which set up pathways and fire register transfers so that:

  • Data is moved from memory to registers, and between registers

  • Data is passed (through the ALU, and

  • Data is stuffed back into the memory
• A fetch-decode-execute cycle five-step cycle:

  1. Instruction Fetch (IF)
  2. Instruction Decode (ID)
  3. Data Fetch (DF) / Operand Fetch (OF)
  4. Instruction Execution (EX)
  5. Result Return (RR) / Store (ST)
• Instruction Fetch (IF)

  • Execution begins by moving the instruction at the address given by the PC (PC 800) from memory to the control unit.

  • Bits of instruction are placed into the decoder circuit of the CU.

  • Once instruction is fetched, the PC can be readied for fetching the next instruction.
• Instruction Decode (ID)

  • ALU is set up for the operation.

  • Decoder finds the memory address of the instruction's data (source operands).

  • Most instructions operate on two data values stored in memory (like ADD), so most instructions have addresses for two source operands.

  • These addresses are passed to the circuit that fetches them from memory during the next step.

  • Decoder finds the destination address for the Result Return step and places the address in the RR circuit.

  • Decoder determines what operation the ALU will perform (ADD), and sets up the ALU.
• Data Fetch (DF)

  • The data values to be operated on are retrieved from memory.

  • Bits at specified memory locations are copied into locations in the ALU circuitry.

  • Data values remain in memory (they are not destroyed).
• Instruction Execution (EX)

  • For this ADD instruction, the addition circuit adds the two source operands together to produce

  their sum.

  • Sum is held in the ALU circuitry.

  • This is the actual computation.
• Return Result (RR)

  • RR returns the result of EX to the memory location specified by the destination address.

  • Once the result is stored, the cycle begins again.
• The processor driven by an internal clock. With every tick of the clock or heartbeat, our CPU goes through a step in what’s called the “Fetch-Execute” cycle, or “Fetch-Decode-Execute”.
• The clock sends out a regular electrical pulse which synchronizes (keeps in time) all the components. The frequency of the pulses is known as clock speed. Clock speed is measured in hertz (Hz). The greater the speed, the more instructions can be performed in any given moment of time.
• A simple processor might use five ticks to complete one instruction (five steps). Modern computers try to start a new instruction each clock tick. This is done using a pipeline. A pipeline is like an automobile assembly line.
• Cycling the Fetch/ Execute Cycle

  • ADD is representative of the complexity of computer instructions...some are slightly simpler, some slightly more complex.

  • Computers achieve success at what they can do with speed.

  • They show their impressive capabilities by executing many simple instructions per second.
• Translation

  • A programmer writes source code, such as: this.Opacity += 0.02.

  • However, the bits the processor needs are known as object code, binary code, or just binary.

  • Source code is translated into assembly code, then into binary.
• Assembly Language

  • Primitive programming language uses words instead of 0s and 1s.

  • ADD Opacity, TwoCths, Opacity

  • To convert source code into assembly, the source code must be compiled by a compiler.

  • A compiler is a computer program that translates another computer program into assembler language. Each language requires its own compiler.

  • The assembly language is converted to machine language by, yet another program called an assembler.
• Integrated Circuits (ICs)

  • Miniaturization

  • Computer clocks can run at GHz rates because their processor chips are so tiny.

  • Electrical signals can travel one foot (30 cm) in a nanosecond.

  • Early computers (the size of whole rooms) could never have run as fast because their components

  were farther apart than one foot.

  • Making everything smaller has made computers faster.
• Integration

  • Early computers were made from separate parts (discrete components) wired together by hand.

  • There were three wires coming out of each transistor, the two wires from each resistor, the two wires from each capacitor, and so on.

  • Each had to be connected to the wires of another transistor, resistor, or capacitor.

  • Active components and the wires that connect them are manufactured together from similar materials by a single (multi-step) process.

  • IC technology places transistors side by side in the silicon, along with the wire(s) connecting them.

  • Result is small and reliable.