Lesson 3

Cards (79)

  • In 1987, Intel came out with the 8086 processor. The Intel 8086 is a 16-bit microprocessor, implemented in N-channel, depletion load, silicon gate technology (HMOS), and packaged it in a 40-pin dual line package.
  • Intel 8086 Microprocessor is an enhanced version of 8085 Microprocessor that was designed by Intel in 1976. It consists of powerful instruction set, which provides operations like multiplication and division easily. It supports two modes of operation. Maximum mode and Minimum mode.
  • 8086 is a 16-bit Microprocessor (μp). It’s ALU, internal registers, and most of its instructions are designed to work with 16-bit binary words.
  • 8086 has a 20-bit address bus that can access up to 220 or 1,048,576 = 1 MB memory locations.
  • 8086 has a 16-bit data bus. It can read or write data to a memory and ports either 16 bits or 8 bits at a time.
  • 8086 can generate 16-bit I/O address, which can support up to 64K or 216 = 65,536 I/O ports.
  • It provides fourteen 16 -bit registers.
  • Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of
    instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU. Most of the registers contain data/instruction offsets within 64 KB memory segment.
    o Code Segment (CS)
    o Data Segment (DS)
    o Stack Segment (SS)
    o Extra Segment (ES)
  • Execution unit (EU)
    Responsible for decoding and executing all instructions
  • The EU of 8086 tells the BIU from where to fetch the instructions or data, decodes instructions and executes instructions
  • Execution of instructions
    The EU extracts instructions from the top of the queue in the BIU, decodes them, generates operands (if necessary) passes them to the BIU and requests it to perform the read or write by cycles to memory or I/O and perform the operation specified by the instruction on the operands
  • BIU
    Buffer Input Unit, receives instructions and data from the system buses and queues them for the EU
  • EU has no direct connection with system buses

    Performs operations over data through BIU
  • Instruction decoder
    Component of the EU that decodes instructions
  • ALU
    Arithmetic Logic Unit, component of the EU that performs operations on operands
  • Instruction QueueBIU contains the instruction queue. BIU gets up to 6 bytes of next  instructions and stores them in the Instruction Queue. Instruction Queue is a group of registers  that holds prefetched instruction bytes for the execution unit. When EU executes instructions and  is ready for its next instruction, then it simply reads the instruction from this instruction queue  resulting in increased execution speed. The queue operates on the principle first-in-first-out  (FIFO).
  • Pipelining – it is fetching the next instruction while the current instruction executes. It is helpful  for speeding up the overall execution process. After the execution of an instruction, the next  instruction is directly fetched from the instruction queue without having to wait for the external  memory to send the instruction. 
  • Instruction Pointer − It is a 16-bit register used to hold the address of the next instruction to be  executed.
  •  Idle state – it is the intervals of no bus activity which may occur between bus cycles.
  • Control Circuitry – it directs the internal operations.
  • Instruction Decoder – it translates the instructions fetched from memory into a series of actions  which the EU performs.
  • Arithmetic Logic Unit (ALU) – it handles all arithmetic and logical operations, like add, subtract,  multiply, divide, OR, AND, NOT, increments, decrements, complements and shift binary number  operations.
  • Register Organization 
    General Purpose Registers 
    Segment Registers 
    Pointers And Indexed Registers 
    Flag Registers
  • The 8086 microprocessor has a powerful set of  
    registers and has a total of fourteen registers that are accessible to the programmer. The 8086   organization is also known as programmer's   model of 8086 which are accessible to   programmers. All registers of 8086 are 16-bit registers. 
  • All registers of 8086 are 16-bit  
    registers. It is divided into four groups:
    Four General purpose registers 
    Four Index/Pointer registers 
    Two Other registers 
    Four Segment registers 
  • AX register − It is also known as Accumulator Register. It consists of two 8-bit registers AL  and AH, which can be combined together and used as a 16-bit register AX. AL in this case contains  the low-order byte of the word, and AH contains the high-order byte. It is used to store operands  for arithmetic operations. 
  • BX register − It is used as a Base Register. It consists of two 8-bit registers BL and BH, which  can be combined together and used as a 16-bit register BX. BL in this case contains the low-order  byte of the word, and BH contains the high-order byte. It is used to store the starting base address  of the memory area within the data segment.
  • CX register − It is referred to as Counter/Count Register. It consists of two 8-bit registers CL  and CH, which can be combined together and used as a 16-bit register CX. When combined, CL  register contains the low-order byte of the word, and CH contains the high-order byte. It is used  in loop instruction to store the loop counter, shift/rotate instructions, and as a counter in string  manipulation.
  • DX register – It is denoted to as Data Register. It consists of two 8-bit registers DL and DH,  which can be combined together and used as a 16-bit register DX. When combined, DL register  contains the low-order byte of the word, and DH contains the high- order byte. This register is  used to hold I/O port address for I/O instruction.
  • Code Segment (CS) – It is used for addressing a memory location in the code segment of the  memory, where the executable program is stored. CS register cannot be changed directly. The CS  register is automatically updated during far jump, far call and far return instructions.
  • Data Segment (DS) − It consists of data used by the program and is accessed in the data segment  by an offset address or the content of other register that holds the offset address. DS register can  be changed directly using POP and LDS instructions.
  • Stack Segment (SS) − It handles memory to store data and addresses during execution. SS  register can be changed directly using POP instruction.
  • Extra Segment (ES) − ES is additional data segment, which is used by the string to hold the  extra destination data. ES register can be changed directly using POP and LES instructions. It is  possible to change default segments used by general and index registers by prefixing instructions  with a CS, SS, DS or ES prefix.
  • Pointers and Indexed Registers 
    One or more pointers and indexed registers are associated with each segment register to get 20-bit physical  address. The pointer registers IP, BP, and SP are associated with code, data, stack segments respectively.  They hold the offset within the code, data, stack segments respectively. The index registers DI and SI are  used as a general-purpose register as well as offset storage in case of indexed, based indexed, and relative  based indexed addressing modes.
  • Stack Pointer (SP) – is a 16-bit register pointing to program stack.  
  • Base Pointer (BP) – is a 16-bit register pointing to data in stack segment. BP register is usually  used for based, based indexed or register indirect addressing.
  • Source Index (SI) – is a 16-bit register. SI is used for indexed, based indexed and register indirect  addressing, as well as a source data address in string manipulation instructions.  
  • Destination Index (DI) – is a 16-bit register. DI is used for indexed, based indexed and register  indirect addressing, as well as a destination data address in string manipulation instructions. 
  • A flag is a 16-bit register that behaves like a flip-flop, it changes its status according to the result stored in  the accumulator and indicates some condition produces by the execution of an instruction or controls  certain operation of the EU. The flag register is one of the special purpose registers. The flag bits are  changed to 0 or 1 depending upon the value of result after arithmetic or logical operations. It has 9 active  flags and they are divided into 2 groups − Status Flags and Control Flags. 
  •  Status Flags 
    It represents the result of the last arithmetic or logical instruction executed. The programmer  cannot set/reset these flags directly. There are 6 flags used to indicate some condition produced  by instruction.