CHAP 8

• Cache


  A type of memory that is faster than main memory and is used to store frequently accessed data

  
• In a computer system, memory has a wide range of type, technology, organization, performance, and cost

  
• No single technology is optimal in satisfying the memory requirements for a computer system
• Typical computer system memory subsystems

  • Some internal to the system
  • Some external accessible via an I/O module

  
• Cache


  Faster than main memory - about 10 times
• Cache


  Smaller than main memory - Cache is in Kilobytes
• Cache type


  Usually SRAM, while main memory is DRAM

  
• No on-die cache. L1 cache on motherboard

  1980s
• L1 cache on die. L2 on motherboard

  Early 1990
• Separate instruction and data cache

  Mid-1990

  
• L3 cache on die

  Early 2000
• Advantage of separate Data and Instruction cache

  • Allows simultaneous fetching of instructions and data
  • Instruction caches are read-only requiring simpler design
  • Prevents data-intensive programs from being retired by the data

  
• Data cache usage


  1. Check if data is available in cache

  2. Use data if available

  3. Fetch new data from main memory if not available

  4. Replace old data with new data

  
• Principle of locality


  Cache is workable and useful due to temporal and spatial locality
• Temporal locality


  When data is used, it is likely that the same data will be used again
• Spatial locality


  When data is used, there is a high probability that nearby data will be needed soon
• A processor spends 90% of its time executing 10% of a program
• Cache Hit


  CPU finds a requested data item in the cache

  
• Cache Miss


  CPU does not find a requested data item in the cache

  
• Reasons for cache misses

  • Starting up a new program
  • Cache too small for active execution code
  • Cache line conflict in a Direct Mapped cache type

  
• Direct Mapped


  Each line in the memory has only one place in the cache

  
• Fully Associative


  A line in the memory can be placed anywhere in the cache

  
• Set Associative


  A line in the memory can only be placed in a restricted set of places in the cache

  
• Most cache are direct mapped, 2-way or 4-way set associative

  
• If a direct mapped cache is 8K, then at any time only 8K portion of the main memory can be in the cache

  
• Cache structure


  • Cache has 2 parts: Tag (address info) and Cache Line (data info)

  
• Cache address


  Consists of Tag, Index, and Offset

  
• The Tag is the address portion that is saved in the cache

  
• The Cache line is the data which is fetched from the main memory

  
• Offset


  Selects the desired data from the cache line
• Index


  Selects the set in the cache

  
• Tag


  Compared with the upper address for a hit
• The size of the Cache line determines the offset
• With 32 address lines, Main Memory Size = 2^32 = 4G

  
• Offset = 5 bits, therefore Cache line = 2^5 = 32 bytes

  
• Index = 8 bits, therefore number of Sets = 2^8 = 256
• Total Cache Size = 32 * 256 = 8Kbytes

  
• Direct mapped cache: the cache line can be placed in only one location in the cache depending on the index

  
• Fully associative cache uses larger tags and does not select an entry based on index bits

  
• The cache line can be placed anywhere in the cache