CHAP 10

• CISC


  Complex Instructions Set Computer
• RISC


  Reduced Instructions Set Computer
• RISC is a departure from the way Intel had been designing the microprocessors
• The RISC computers are very different from the CISC computers
• Pentium is a CISC design with RISC concepts to improve its performance
• Some RISC concepts used in CISC designs

  • Superscalar
  • Large on-chip caches
  • Single-cycle instructions

  
• Complex Instruction Set Computer (CISC)

  • Large number of complex addressing modes
  • Many versions of instructions for different operands
  • Different execution times for instructions
  • Few processor registers
  • Microcoding
• Reduced Instruction Set Computer (RISC)


  • One instruction per clock cycle
  • Memory accesses by dedicated load/store instructions
  • Few addressing modes
  • Hard-wired control logic
• RISC examples


  • ARM
  • SPARC
• CISC emphasizes


  • Hardware complexity
• RISC emphasizes


  • Compiler (s/w) complexity
• Microcoding was used to tackle complex designs
• Initially CPU instruction sets were "hard wired"
• Microcode developed as a simpler method of developing the control logic for a computer
• Microcode allows a processor's behaviour and programming model to be defined via microprogram routines
• Microcoding requires many clock cycles to complete an instruction
• Complex instructions lead to complex Control Unit design
• Even simple instructions will also take longer to execute
• Complex instructions in CISC

  Example: MOVSB
• A Reduced Instruction Set Computer (RISC) utilizes a small, highly-optimized set of instructions
• Currently, RISC is considered the most efficient CPU architecture technology available today
• RISC design


  • Simple instructions
  • Hardwired control units
  • Many symmetrical registers
  • Load store architecture
  • Simple addressing modes
• CPU only uses 20% of the instructions 80% of the time
• RISC removes multiplication and division instructions and replaces them with addition and subtraction methods
• Division is done as a series of subtractions in RISC
• RISC can replace division with multiplication of the reciprocal
• RISC is 1.78 times faster than CISC based on execution time calculations
• Instructions Frequency


  • Move
  • Branch/Jump
  • Compare
  • Add, Subtract, AND, OR
  • Multiply
  • Divide
• Only MOV can access memory in RISC's load store architecture
• Arithmetic instructions in RISC can only be used with registers and not memory
• RISC computers tend to use the three-operand format instead of the two-operand format
• RISC computer/architecture started the use of compiler technology to optimize software programs
• Compiler designers tend to use only the relatively simple instructions
• RISC compilers can assign variables to registers
• RISC compilers have more registers to use and can allocate variables to registers in an optimum manner
• Copy Propagation optimizes calculations by reducing redundant operations
• Loop unrolling reduces the number of times the program loops
• ARM processor is a family of CPUs based on the RISC architecture developed by Advanced RISC Machines (ARM)
• ARM processors are extensively used in consumer electronic devices such as smartphones and tablets
• ARM processor features


  • Load/store architecture
  • An orthogonal instruction set
  • Mostly single-cycle execution
  • Enhanced power-saving design
  • 64 and 32-bit execution states