Processor and components

• Fetch-Execute Cycle: The process of fetching the next instruction from memory and executing it.
• Fetch:

  1. Collect the address of instruction from PC
  2. transferred to MAR
  3. PC increments by 1
  4. Main memory to MBR
  5. MBR is transferred to CIR
• Decode:

  1. Instruction in CIR is split into two parts: opcode and operand and decoded

  Execute:

  1. Code is executed and carried out, waiting for next instruction
• Control Unit (CU): Responsible for controlling the flow of data between components, including the CPU, RAM, and input/output devices.
• The data bus is used to transfer data and instructions
• The address bus is used to specify the address of a memory location
• The control bus is used to send control signals that manage and orchestrate the operations that take place inside a computer system
• The ALU is responsible for performing arithmetic calculations and logical operations 
• What is the purpose of the current instruction register (CIR) in the Fetch-Execute cycle?

  It stores instructions currently being executed
• What does the memory address register (MAR) hold?

  It holds the memory location of data read/written
• What is the function of the memory buffer register (MBR)?

  It holds data read/about to be written
• What does the program counter (PC) store?

  It stores the memory location of the next instruction needed
• What information does the status register (SR) contain?

  It contains data about the architecture state and processor
• How do the registers interact during the Fetch-Execute cycle?

  • The PC points to the next instruction.
  • The MAR retrieves the instruction's address.
  • The MBR holds the instruction fetched.
  • The CIR stores the instruction for execution.
  • The SR provides status information during execution.
• What is a stored-program concept?


  When data and instructions are stored in the main memory. When needed they FDE